Circuit arrangement and transistor control method

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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C327S307000

Reexamination Certificate

active

10549561

ABSTRACT:
In order to improve a circuit arrangement (100) and a method of controlling at least one transistor (10, 12, 14, 18), especially of controlling the resistance value of at least one MOS transistor with vanishing DC modulation in such a way that a compensation of resistance variations without control deviation is also possible for the case where the transistor (10, 12, 14, 18) is operated with a vanishing DC voltage, i.e. with a zero DC voltage and indeed without the aid of a reference frequency, it is suggested that in addition to at least a first reference element (10, 20, 70), which has at least a first reference transistor (10) with a first offset from the operating point, at least a second reference element (12, 30, 40, 72, 74, 76) is provided which has at least a second reference transistor (12) with a second offset from the operating point equal in value but opposed in sign to the first buffer storage, wherein an in particular arithmetic average can be formed from the first offset and the second offset for approximating and achieving an optimum operating point.

REFERENCES:
patent: 6339355 (2002-01-01), Yamauchi et al.
patent: 2001/0011921 (2001-08-01), Ooishi
patent: 2003/0076159 (2003-04-01), Shor et al.
patent: 0 957 653 (1999-11-01), None

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