Circuit arrangement, and junction field effect transistor suitab

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Junction field effect transistor

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257263, 257272, H01L 29772

Patent

active

057478414

ABSTRACT:
A circuit arrangement for comparatively high powers, for example, for gas discharge lamps is protected against high currents, which may be caused inter alia by inrush effects or transients, by a semiconductor current limiter element V. The current limiter element comprises a semiconductor body of substantially a given conductivity type, for example the n-type. The main electrodes are provided at the upper and the lower surface of the semiconductor body and comprise two metal electrodes which are connected to the semiconductor body via highly doped contact zones. The doping of the interposed region is such that current saturation occurs from a certain voltage upon a rise in voltage between the main electrodes. In a first embodiment, buried floating p-type zones are formed in the interposed region, so that the element is a junction field effect transistor with floating gate. In a second embodiment, the thickness and/or doping concentration of the intermediate region is so chosen that the current is limited owing to velocity saturation. Such a current limiter element is eminently suitable for use in systems with gas discharge lamps because it is resistant to very high voltages and a high dissipation, is capable of passing the current in two directions, and can in addition be manufactured in a very simple process, so that it is comparatively inexpensive.

REFERENCES:
patent: 3947707 (1976-03-01), Shannon et al.
patent: 4187513 (1980-02-01), Spellman
patent: 5008725 (1991-04-01), Lidow et al.
"Physics of Semiconductor Devices", by S.M. Sze, 2nd. ed., John Wiley & Sons, New York, pp. 351-357.

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