Circuit, architecture and method(s) of controlling a periodic si

Oscillators – Automatic frequency stabilization using a phase or frequency... – Particular error voltage control

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331DIG2, 331 2, 331 1A, 331 16, 455260, 375376, H03L 700

Patent

active

060844795

ABSTRACT:
An apparatus comprising a phase-locked loop, a select circuit and a control circuit. The phase-locked loop may be configured to generate a feedback signal (along with a buffered output signal) in response to a reference clock and a control signal. A select circuit may be configured to present a reference clock signal in response to a plurality of input clock signals and a select signal. The slew control circuit may be configured to generate the control signal in response to the select signal, and the feedback signal. The control circuit may be used to reduce noise presented to the phase-locked loop and may allow for a rapid initial frequency acquisition of the PLL to the reference frequency.

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