Circuit architecture and method for switching sensor resolution

Image analysis – Image sensing

Reexamination Certificate

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Reexamination Certificate

active

06249618

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to image sensing systems and more particularly relates to a circuit architecture and associated method for an image sensor employing an internal mechanism for switching resolutions so as to minimize the number of shift registers in use and increase the overall performance of the image sensor.
2. Description of the Related Art
There are many applications that need an imaging system to convert a target to an electronic format that can be subsequently analyzed, printed, distributed and archived. The electronic format is generally an image of the target. A typical example of the imaging system is a scanner and the target is a sheet of paper from a book or an article. Through the scanner, an electronic or digital image of the paper is generated.
An imaging system generally includes a sensing module that converts a target optically into an image. The key element in the sensing module that converts the target optically to the image is an image sensor comprising an array or matrix of photodetectors responsive to light impinged upon the image sensor. Each of the photodetectors produces an electronic (charge) signal representing the intensity of the light reflected from the target. The electronic signals from all of the photodetectors are readout and then digitized through an analog-to-digital converter to produce digital signal or image of the target.
One very common type of image sensor is a charge coupled device (CCD). Another low cost image sensors, perhaps used more commonly in the future, are made out of complementary metal-oxide semiconductor (CMOS). Generally, a significant number of shift registers are used in both types of the image sensors as auxiliary circuitry to facilitate the readout of the electronic signals. For example, in one type of an image sensor that comprises
1024
(1K) photodetectors, there typically employ
1024
or more shift registers in the image sensor.
It is understood in the art that the area occupied by the large number of shift registers is quite significant compared to the area occupied by photodetectors in a piece of semiconductor that is eventually packaged as an image sensor. The cost of the image sensor would not be further reduced if the size of the image sensor can not be reduced. There is therefore a great need to reduce the size of the image sensor without compromising the overall performance of the image sensor.
CMOS image sensors have many unique characteristics that are being researched to explore possibilities of further performance improvement and cost reduction. One of the desirable possibilities is to determine if the size of a CMOS image sensor can be further reduced while the overall performance is increased. Image sensors of smaller size and improved overall performance will be certainly welcome, especially in consumer electronics markets.
SUMMARY OF THE INVENTION
The present invention has been made in consideration of the above described problems and needs and has particular applications to image sensors used in scanners, digital cameras and computer vision systems.
Many image sensors employ a large number of shift registers to facilitate the readout of electronic signals generated by photodetectors in the image sensors. These shift registers typically occupy a fairly large amount of area in an image sensor. In reality, one of the factors that determine the cost of an image sensor is the number of image sensors a piece of semiconductor wafer of regular size can be cut into. If an image sensor without compromising any performance can be designed smaller, that means that a piece of wafer could produce more sensors and the cost could be reduced significantly.
The disclosed architecture for an image sensor and the associated method employ an internal switching mechanism controlled by a much reduced number of shift registers to facilitate the readout of electronic signals generated by the photodetectors in the image sensor. Further, the overall performance of the image sensor is improved.
According to one embodiment of the present invention, an image sensor comprises an array of photodetectors, each responsive to light impinged thereupon and independently producing an electronic signal after the photodetectors are collectively reset by a reset signal, a multiplexer comprising a plurality of groups of switches, each of the switches coupled to one of the photodetectors; the groups of switches being serially turned on in synchrony with a clock control signal; wherein when one of the groups of switches are turned on, respective electronic signals of the photodetectors coupled by the one of the groups of switches are respectively readout; and a number of resolution switches, each operating in synchrony with the clock control signal and receiving the respective electronic signals.
The image sensor further comprises an amplifier having multiple inputs, each of the inputs coupled to one of the resolution switches and receiving at least one of the respective electronic signals when one of the resolution switches is turned on; wherein the one of the resolution switches receives the one of the respective electronic signals.
Accordingly, an important object of the present invention is to provide a new architecture and method for an image sensor that employ an internal switch mechanism to facilitate the readout of electronic signals generated by the photodetectors in the image sensor.
Other objects, together with the foregoing are attained in the exercise of the invention in the following description and resulting in the embodiment illustrated in the accompanying drawings.


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patent: 6011859 (2000-01-01), Kalnitsky et al.
patent: 6035077 (2000-03-01), Chen et al.

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