Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
1999-01-28
2004-05-25
Sam, Phirin (Department: 2661)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C340S815450
Reexamination Certificate
active
06741593
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to data communication systems. More specifically, the present invention relates to a circuit architecture and method for displaying port status in real time using a minimum number of LED indicators.
2. Description of the Related Art
In data communications, a switch system is a network device that selects a path or circuit for sending a unit of data to its next destination. A switch system may also include the function of a router, a device or program that can determine the route and specifically what adjacent network point the data should be sent to. In general, a switch system is a simpler and faster mechanism than a router, which requires knowledge about the network and how to determine the route.
On larger networks, the trip from one switch point to another in the network is called a hop. The time a switch system takes to figure out where to forward a data unit is called the latency which is typically measured between the first bit of an input (inbound) packet and the first bit of a corresponding output (outbound) packet. In a multi-port switch system, the latency is measured between the first bit of an input packet and the first bit of a corresponding output packet to the last one of the multiple output ports. In reality, one of the factors that determines the cost and performance of a switch system is largely the latency. A system with low latency generally warrants a high price tag. There is therefore a great need for a switch system that has minimum latency but is low cost.
Often a user of such system, typically a system administrator, needs to know in real time the status of each port in the system. LED indicators are often used in this regard, for example, an LED indicator for port speed is “on” to indicate one data baud rate going through a port and “off” to indicate another data baud rate going through the port. If the number of statuses that need to display to a user is large, there would be a forbidden number of such LED indicators. Thus there is another need for such system to provide an efficient visual monitoring means to indicate all necessary statuses with a minimum number of LED indicators.
SUMMARY OF THE INVENTION
The present invention has been made in consideration of the above described problems and needs and has particular applications in switch systems with multiple signal paths or ports. In many cases, a user of a switch system, typically a system administrator, needs to know the status of each of the ports, for example, the buffer status and the data speed thereof. The present invention discloses a method and circuit architecture for displaying such status using a minimum number of display indicators and can be advantageously used in systems with multiple signal paths and ports.
The display system including the circuit architecture and method comprises a plurality of shift circuits and further receives a data signal comprising groups of status signals. The data signal is serially shifted from one shift circuit to another so as to parse the status signals to be displayed on appropriate LEDs designated for each of the signal paths or ports. As a result, multiple statuses can be effectively displayed in real time using a minimum number of LEDs.
According to one embodiment, the present invention is a method for displaying port statuses of a switch system having N ports, the method comprising:
receiving a clocking signal and a data signal, the data signal comprising M groups of status information; each of the M groups of status information comprising N status signals, each of the N status signals corresponding to one of the N ports of the switch system;
providing the data signal to M shift circuits connected in series; each of the M shift circuits providing N outputs; wherein the N outputs are respectively coupled to N display indicators, each for one of the N ports of the switch system;
shifting the data signal through the M shift circuits in synchronization with the clocking signal; and
causing N status signals to be displayed on the N indicators respectively through the N outputs of the each of the M shift circuits.
According to another embodiment, the present invention is a circuit architecture for displaying port statuses of a switch system having N ports, the circuit architecture comprising:
M LEDs for each of the N ports so that there are N×M such LEDs;
M shift circuits connected in series and receiving a clocking signal and a data signal, the data signal comprising M groups of status signals and provided by a display interface in the switch system;
each of the M shift circuits comprising N local shift registers and each of the local shift registers coupled to one of the LEDs for each of the N ports;
wherein one of the groups of status signals are respectively displayed on each of the LEDs for the N ports when the data signal is serially shifted from one of the shift circuits to another one of the shift circuits according to the clocking signal; and
wherein each of the status signals in the one of the groups of status signals is displayed on one of the display indicators when the one of the groups of status signals is serially shifted from one of the local shift registers to another one of the local shift registers according to the clocking signal.
There are many advantages and benefits in the present invention. One of them is the reduced complexity of real-time display of the statuses for all the ports. The circuit architecture can be now simply implemented with a series of shift registers together with a data signal comprising groups of status signals provided periodically from the display interface. By serially shifting the data signal, status signals can be parsed and respectively displayed on appropriate LEDs designated to each of the ports.
Other objects, together with the foregoing are attained in the exercise of the invention in the following description and resulting in the embodiment illustrated in the accompanying drawings.
REFERENCES:
patent: 6058427 (2000-05-01), Viswanath et al.
patent: 6181702 (2001-01-01), Egbert
patent: 6243020 (2001-06-01), Lam et al.
patent: 6400715 (2002-06-01), Beaudoin et al.
Lin Wallace
Sun Peter C. P.
Chang C. P.
Cypress Semiconductor Corporation
Sam Phirin
Zheng Joe
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