Circuit, apparatus and method for capturing a representation...

Data processing: measuring – calibrating – or testing – Measurement system in a specific environment – Electrical signal parameter measurement system

Reexamination Certificate

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C375S355000

Reexamination Certificate

active

07076377

ABSTRACT:
A circuit, apparatus and method obtains system margin at the receive circuit using phase shifted data sampling clocks while allowing the CDR to remain synchronized with the incoming data stream in embodiments. In an embodiment, a circuit includes first and second samplers to sample a data signal and output data and edge information in response to a data clock signal and an edge clock signal. A phase detector generates phase information in response to the data information and the edge information. A clock phase adjustment circuit generates the data clock signal and the edge clock signal in response to the data information during a synchronization mode. The clock phase adjustment circuit increments a phase of the data clock signal during a waveform capture mode.

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patent: 6292116 (2001-09-01), Wang et al.
patent: 6326852 (2001-12-01), Wakayama
patent: 6463109 (2002-10-01), McCormack et al.
patent: 6615148 (2003-09-01), Pickerd
patent: 2003/0086517 (2003-05-01), Vallet et al.
patent: 2004/0114698 (2004-06-01), Barrett et al.

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