Amplifiers – With semiconductor amplifying device – Including particular biasing arrangement
Reexamination Certificate
2003-03-28
2004-07-27
Shingleton, Michael B. (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including particular biasing arrangement
C330S297000
Reexamination Certificate
active
06768382
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is generally in the field of semiconductor devices. More specifically, the invention is in the field of semiconductor amplifiers.
2. Related Art
Power amplifiers are used in a number of applications, including mobile telephones, for amplifying an input signal. In order to accurately control the output power of a power amplifier, it is necessary to accurately detect its output power. Thus, various power amplifier sensing techniques have been used for measuring the output power of a power amplifier.
Current power amplifier sensing techniques, however, suffer various disadvantages. For example, in a coupler/detector arrangement, the detector is coupled to the output stage of the power amplifier resulting in appreciable loss of power at the output of the power amplifier. This loss of power, in turn, results in undesirable inefficient operation of the power amplifier. Furthermore, coupler/detector arrangements are expensive to implement and occupy large circuit areas, both of which are undesirable.
In other approaches, sensing circuits detect the power amplifier collector current. Examples of these techniques include direct collector current sensing and indirect collector current sensing. Direct collector current sensing, however, is particularly inefficient at the peak power output of the power amplifier, effectively reducing the maximum output power of the power amplifier. Furthermore, the direct collector current sensing approach requires the use of complex techniques and expensive components for proper operation and in order to provide adequate dynamic range. Indirect collector current sensing, likewise, operates inefficiently. Moreover, the indirect collector current sensing approach requires the use of complex techniques and expensive components, e.g., a scaled load line for accurate tracking of the reference collector current to the output collector current, which results in increased manufacturing costs and enlarged device size.
Accordingly, there is a strong need in the art for a small, low cost circuit and technique capable of efficiently and accurately sensing the output power of a power amplifier.
SUMMARY OF THE INVENTION
The present invention is directed to circuit and technique for accurate and efficient power amplifier sensing. The invention overcomes the need in the art for a small, low cost circuit and technique capable of efficiently and accurately sensing the output power of a power amplifier.
In one exemplary embodiment, a sensing circuit for sensing an output power of a power amplifier comprises a biasing circuit coupled to a detection circuit. The biasing circuit feeds a base current to the power amplifier, and the detection circuit draws a mirror current of the base current. The mirror current is fed at a first node to each of an impedance circuit and a first FET, wherein a sense voltage which accurately tracks the output power of the power amplifier is generated at the first node. In one exemplary embodiment, the first FET is activated when a beta parameter of the power amplifier decreases.
According to one particular embodiment, the impedance circuit comprises a resistor. In another exemplary embodiment, the impedance circuit comprises a resistor in series with a diode. According to one particular embodiment, a first end of the impedance circuit is connected to a drain and a gate of the first FET at the first node. In this particular embodiment, a second end of the impedance circuit is coupled to a source of the first FET at a second node, and the second node is connected to a reference voltage, such as a ground voltage.
According to another particular embodiment, the biasing circuit comprises a second FET, and the detection circuit comprises a third FET. In this particular embodiment, a gate of the second FET is coupled to a gate of the third FET in a current mirror configuration. A drain of the second FET is coupled to a base of the power amplifier; a source of the second FET is coupled to a supply voltage; a drain of the third FET is connected to the first node; and a source of the third FET is coupled to the supply voltage. In certain embodiments, the biasing circuit further comprises an operational amplifier, where an output of the operational amplifier is connected to the gate of the second FET, and a noninverting input of the operation amplifier is connected to the drain of the second FET. In this particular embodiment, a bias voltage is supplied to an inverting input of the operation amplifier to control the output power of the power amplifier.
According to various embodiments of the invention, accurate and efficient detection of the output power of the power amplifier is achieved. Furthermore, manufacturing costs and device size are also reduced. Other features and advantages of the present invention will become more readily apparent to those of ordinary skill in the art after reviewing the following detailed description and accompanying drawings.
REFERENCES:
patent: 6509722 (2003-01-01), Lopata
patent: 2003/0201834 (2003-10-01), Pehlke
IBM Technical Disclosure Bulletin Apr. 1, 1981, US vol. 23, Issue II pp 4898-4899.
Andrys Paul
Ripley David
Shie Terry
Wyse Russ
Farjami & Farjami LLP
Shingleton Michael B.
Skyworks Solutions Inc.
LandOfFree
Circuit and technique for accurate and efficient power... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Circuit and technique for accurate and efficient power..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit and technique for accurate and efficient power... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3247864