Circuit and method of series biasing a single-ended mixer

Details Circuit and method of series biasing a single-ended mixer Circuit and method of series biasing a single-ended mixer

1994-09-06

1996-08-27

Faile, Andrew I.

Telecommunications

Receiver or analog modulated signal frequency converter

Frequency modifying or conversion

327113, 327408, 327356, H04B 128

Patent

active

055510760

ABSTRACT:
A mixer circuit (10) combines a buffered RF signal with the LO signal at the gate of a mixing transistor (20) for providing sum and difference product terms as the IF output signal. An inductor (46) provides a DC signal path between the source of the mixing transistor and the drain of the buffering transistor (14) to share the same operating current and thereby reduce power consumption in the mixer. The DC path inductor provides a high impedance to block the RF signal and LO signal. A bias circuit (26, 28) sets the bias point at the gate of the mixing transistor to a mid-point value between V.sub.DD and ground potential. In disable mode, the bias point of the mixing transistor is sufficiently low that the LO signal does not have sufficient power to turn on buffering and mixing transistors that could generate mixing products at the IF output.

REFERENCES:
patent: 4845389 (1989-07-01), Pyndiah et al.
patent: 5039891 (1991-08-01), Wen et al.
patent: 5325000 (1994-06-01), Birkeland et al.
patent: 5339459 (1994-08-01), Schiltz et al.
patent: 5376829 (1994-12-01), Rogers et al.
patent: 5396132 (1995-03-01), Shiga
Elektor (Jul./Aug. 1977), Short Wave Converter p. 51.

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