Circuit and method of multi-channel dual slope ADC with...

Coded data generation or conversion – Converter compensation

Reexamination Certificate

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C341S167000

Reexamination Certificate

active

06906648

ABSTRACT:
A multi-channel dual slope analog-digital converter with offset cancellation an hysteresis input is provided in the present invention, wherein a charge reset period and an auto zero period are eliminated, so as to shorten cycle time. An offset cancel capacitor is also eliminated, so that large chip area is avoided. With inserting a dummy cycle in between each measurement cycle, coupling error can be avoided between different conversion channels. Also, hysteresis property of a Schmitt comparator in the comparator unit manages to filter out minute residual voltage offset, so that the output of converter retains its residual voltage level. A multi-channel dual slope analog-digital converting method is also provided in the invention.

REFERENCES:
patent: 4337456 (1982-06-01), Deffendall et al.
patent: 5262780 (1993-11-01), Gray
patent: 5321403 (1994-06-01), Eng et al.

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