Circuit and method of controlling a regulator with an output...

Electricity: power supply or regulation systems – In shunt with source or load – Using choke and switch across source

Reexamination Certificate

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C323S217000

Reexamination Certificate

active

06177782

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a power factor correction controller circuit.
BACKGROUND OF THE INVENTION
Power factor correction (pfc) circuits are typically used within power supply applications requiring ac/dc rectification. Rectifying arrangements for use in such an application may essentially comprise a full wave voltage rectifier, typically in the form of a diode bridge, and an output capacitor, to provide regulation of the output wave form. Such a rectifying arrangement, however, only draws current from the ac supply (typically a mains electricity supply) when the full wave rectified voltage is greater than the voltage across the output capacitor. This gives rise to an inefficient current profile of the input ac current consisting of separated narrow pulses of current having large peak values. This current profile has a high harmonic content and gives rise to a very low power factor (about 0.5-0.6) of the rectifying arrangement as a whole. The high harmonic content in turn gives rise to large line noise (typically reflected back onto the ac mains supply). Such a current profile, in addition to being inefficient, is also unacceptable under EC standard IEC1000-3-2.
A known solution to mitigate the problem of the inefficient current profile is to employ a pfc circuit which is inserted between the output capacitor and the diode bridge, and which essentially consists of an inductor followed by a diode with a switch connected between ground and between the inductor and the diode. By rapidly switching the switch on and off, current may be drawn from the input, full-wave rectified signal even when the input voltage is less than the output voltage. In fact, with such an arrangement the output voltage is always greater than the input voltage and for this reason such an arrangement is typically referred to as being in a boost configuration. Generally, the inductor, diode and switch arrangement may be termed a switched inductor pfc circuit and the circuit which controls the on and off times of the switch may be termed a pfc controller circuit.
With such an arrangement, each section of time when the switch is switched on to connect the inductor to ground may be termed an on time phase having an on time duration, t
ON
, with a corresponding off time phase having an off time duration, t
OFF
, occurring between each on time phase. A single cycle, having a period, &tgr;, comprises an on time phase together with an off time phase, the period &tgr; being given by &tgr;=t
ON
+t
OFF
. Each cycle will repeat with a frequency given by f=1/&tgr; and the resultant on-off or pulse width modulated signal will have a duty cycle of t
ON
/&tgr;.
A known pfc circuit of this nature operates by comparing the output voltage of the rectifying arrangement with a fixed reference voltage and controlling t
ON
to maintain the output voltage at a fixed level. This generally results in a large difference between the peak value of the input voltage (typically from the mains electricity supply) and the substantially regulated output voltage. This large difference between the peak value of the input voltage and the output voltage requires a correspondingly large inductor. Furthermore, for a given output power requirement the duty cycle of the switch arrangement must also be correspondingly large for a large difference between the input and output voltages.
Furthermore, it is known to operate a power factor correction circuit in what is termed a critical discontinuous mode in which t
OFF
is such that the switch is switched back on again as soon as the current flowing through the inductor falls to substantially zero. In order to do this, conventional controllers measure the voltage across an additional winding which is coupled to the switched inductor, which voltage switches when the current flow through the inductor falls to zero. However, the provision of the additional winding represents an expense which adds to the total cost of the power factor correction circuit.
The present invention seeks to provide a power factor correction controller circuit which at least mitigates one or more of the disadvantages of a conventional pfc circuit as discussed above.
SUMMARY OF THE INVENTION
According to a first aspect of the present invention, there is provided a power factor correction controller circuit for controlling the duration of each on time phase and off time phase of a switched inductor power factor correction circuit which is adapted for use with a rectifying arrangement producing a substantially regulated output voltage, Vo, said controller circuit comprising an input terminal for receiving a signal representative of Vo; an output terminal for outputting a signal representative of the duration of each on time phase and off time phase; and on time determination means; wherein the on time determination means acts to vary the duration of each on time phase in an inverse dependence on Vo.
By inverse dependence it is meant that as the output voltage Vo increases the duration of each on time reduces. The relation need not be directly inversely proportional (i.e. y=1/x), but may, for example, be a complicated inverse quadratic relationship (e.g. y=(ax
2
+bx+c)
−1
). Preferably the duration of each on time phase is inversely proportional to the square of the sum of Vo and an arbitrary off-set constant which may be positive, negative or zero (i.e. for an arbitrary off-set constant V, the on time duration is given by t
ON
=k/(Vo+V)
2
).
The controller circuit preferably further comprises a voltage regulator which acts to prevent the output voltage Vo from exceeding a predetermined maximum value. Ideally the voltage regulator is a low gain regulator. Preferably the voltage regulator acts to influence or over-ride the on time determination means to rapidly reduce the duration of each on time phase as Vo approaches the predetermined value.
Preferably the on time determination means comprises a signal generator for generating an increasing or decreasing signal and a comparator for comparing the increasing or decreasing signal with an on time reference signal and detecting when the increasing or decreasing signal exceeds or falls below the on time reference signal. Preferably the increasing or decreasing signal varies between an initial value at the start of each on time phase and the value of the on time reference signal at the end of each on time phase.
Preferably the increasing or decreasing signal varies at a rate which depends upon the magnitude of Vo (the rate of change of the signal being substantially the inverse of the maximum duration of each on time phase). The on time reference signal is preferably produced by the voltage regulator and preferably approaches the initial value of the increasing or decreasing signal as Vo approaches its predetermined maximum value.
In a preferred embodiment of the present invention, the signal generator comprises an on time capacitor the voltage across which increases from an initial value at a rate which depends upon Vo, and a voltage comparator which compares the voltage across the capacitor with an on time reference voltage generated by the voltage regulator. The signal generator also ideally includes an on time resistor connected to the output voltage Vo so as to generate a current signal whose value depends upon the value of Vo for charging the on time capacitor at the desired rate.
Preferably the signal representative of the duration of each on time phase and off time phase outputted from the output terminal is a pulse width modulated signal, the width of each pulse being representative of the duration of a corresponding on time phase.
According to a second aspect of the present invention, there is provided a power factor correction controller circuit for controlling the duration of each on time phase and off time phase of a switched inductor power factor correction circuit which is adapted for use with a rectifying arrangement producing a substantially regulated output voltage, Vo, said contr

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