Circuit and method of aligning clock signals

Details Circuit and method of aligning clock signals Circuit and method of aligning clock signals

1991-06-28

1992-09-01

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307511, 307525, 307529, 307269, 328 63, H03K 906

Patent

active

051441705

ABSTRACT:
A clock alignment circuit is responsive to a high speed clock signal for generating a low speed clock signal. A clock generator circuit monitors the phase difference between the high speed clock signal and the low speed clock signal and develops a control signal in response thereto during a time slot window signal for adjusting the transitions of the low speed clock signal to align with the high speed clock signal. The clock generator circuit is placed in the vicinity of the associated utilization circuit to that the low speed and high speed clock signals maintain alignment.

REFERENCES:
patent: 3997872 (1976-12-01), Cane et al.
patent: 4471299 (1984-09-01), Elmis
patent: 4719365 (1988-01-01), Misono
patent: 4736162 (1988-04-01), Ishihara
patent: 4771441 (1988-09-01), Spengler et al.
patent: 4912564 (1990-03-01), Saitoh
patent: 4973860 (1990-11-01), Ludwig
patent: 4988901 (1991-01-01), Kamuro et al.

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