Circuit and method for voltage level conversion

Details Circuit and method for voltage level conversion Circuit and method for voltage level conversion

1980-07-07

1982-08-03

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307264, 307482, H03K 602, H03K 19017

Patent

active

043429289

ABSTRACT:
A known FET driver circuit which is to be controlled at the gate by means of relatively low TTL signals, is improved in such a manner that the source potential of the input transistors is shifted oppositely to the input signal. This leads to an increase in the effective potential difference in the signal level applied to the input transistors and thus to an improved switching speed.

REFERENCES:
patent: 3708689 (1973-01-01), Lattin
patent: 3710271 (1973-01-01), Putnam
patent: 3739194 (1973-06-01), Freeman et al.
patent: 3900746 (1975-08-01), Kraft et al.
patent: 4063119 (1977-12-01), Odell et al.
patent: 4264829 (1981-04-01), Misaizu
E. Arai et al., "A 64-Kbit Dynamic MOS RAM", IEEE Journal of Solid-State Circuits, vol. SC-13, No. 3, Jun., 1978, pp. 333-338.

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