Circuit and method for trimming integrated circuits

Details Circuit and method for trimming integrated circuits Circuit and method for trimming integrated circuits

2008-01-15

2008-10-14

Kerveros, James C (Department: 2117)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Converting input voltage to output current or vice versa

C324S765010

Reexamination Certificate

active

07436222

ABSTRACT:
A programmable after-package, on-chip reference voltage trim circuit for an integrated circuit having a plurality of programmable trim cells generating a programmed sequence. A converter is provided to convert the bit sequence into a trim current. The trim current is added to an initial value of a reference voltage to be trimmed, as generated by the integrated circuit. Once the correct value of the trim current is determined, isolation circuitry is programmed to isolate the trim circuitry from the remainder of the IC, thereby freeing the logic and package pins associated with the IC for use by users of the IC. The preferred trim circuitry includes fuses which are blown in accordance with a bit value supplied to the trim cell to permanently fix a trim current value, once a best fit value is determined.

REFERENCES:
patent: 3890610 (1975-06-01), Cahen
patent: 4225878 (1980-09-01), Dobkin
patent: 4335371 (1982-06-01), Connolly et al.
patent: 4412241 (1983-10-01), Nelson
patent: 4665356 (1987-05-01), Pease
patent: 4713602 (1987-12-01), Ueda
patent: 4766366 (1988-08-01), Davis
patent: 4823320 (1989-04-01), Smayling et al.
patent: 5079516 (1992-01-01), Russell et al.
patent: 5353028 (1994-10-01), de Wit et al.
patent: 5361001 (1994-11-01), Stolfa
patent: 5426616 (1995-06-01), Kajigaya et al.
patent: 5563549 (1996-10-01), Shieh
patent: 5568083 (1996-10-01), Uchiyama et al.
patent: 5663589 (1997-09-01), Saitoh et al.
patent: 5675280 (1997-10-01), Nomura et al.
patent: 5682049 (1997-10-01), Nguyen
patent: 5768290 (1998-06-01), Akamatsu
patent: 5771012 (1998-06-01), Shu et al.
patent: 5838076 (1998-11-01), Zarrabian et al.
patent: 6184720 (2001-02-01), Kim et al.

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