Circuit and method for testing an integrated circuit

Details Circuit and method for testing an integrated circuit Circuit and method for testing an integrated circuit

1997-08-22

1999-08-10

Chung, Phung M.

Excavating

G11C 2900

Patent

active

059369744

ABSTRACT:
A selector circuit (12) for placing a memory device (10) in test mode. The selector circuit (12) uses a logic circuit (26) to determine when a control signal provided to a pin of the memory device (10) maintains a first logic level for a period of time exceeding the specification for the control signal in normal operation. A multiplexer (24) receives the control signal and a substitute control signal at an alternate pin of the memory device. The substitute control signal is used in place of the control signal during the test. The output of the logic circuit (26) is coupled to control the multiplexer (24) to select the control signal for use in addressing a cell of the memory device (10) in normal operation and to select the substitute control signal for use in addressing a cell of the memory device (10) in test mode.

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