Circuit and method for storing data in operational and sleep...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Particular stable state circuit

Reexamination Certificate

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Details

C327S201000, C327S202000

Reexamination Certificate

active

11088268

ABSTRACT:
The application relates to a circuit for storing a signal during sleep mode, said embodiments of the circuit comprising: a sleep signal input operable to receive a sleep signal; a clock signal input operable to receive a clock signal; a plurality of latches clocked by said clock signal, at least one tristateable device clocked by said clock signal, said at least one tristateable device being arranged at an input of at least one of said plurality of latches, said at least one tristateable device being operable to selectively isolate said input of said at least one latch in response to a predetermined clock signal value; clock signal distribution means operable to distribute said clock signal to said plurality of latches and said at least one tristateable device; wherein in response to a sleep signal said circuit is operable to: reduce a voltage difference across at least a portion of said circuit such that said portion of said circuit is powered down; and maintain a voltage difference across at least one storage latch, said at least one storage latch being said at least one of said plurality of latches; said clock signal distribution means being operable to hold said clock signal at said predetermined value such that said input of said storage latch is isolated.

REFERENCES:
patent: 5926487 (1999-07-01), Chappell et al.
patent: 5973529 (1999-10-01), Chappell et al.
patent: 6437623 (2002-08-01), Hsu et al.
patent: 6788122 (2004-09-01), Jones, Jr.
patent: 2003/0218231 (2003-11-01), Sani et al.
patent: 1 130 778 (2001-09-01), None
patent: 1 220 450 (2002-07-01), None
patent: WO 01/65345 (2001-09-01), None
S. Shigematsu et al, “A 1-V High-Speed MTCMOS Circuit Scheme for Power-Down Application Circuits”IEEE Journal of Solid-State Circuits, vol. 32, No. 6, Jun. 1997, pp. 861-869.

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