Circuit and method for reducing power in a memory device...

Details Circuit and method for reducing power in a memory device... Circuit and method for reducing power in a memory device...

2007-07-16

2008-12-02

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Powering

Conservation of power

C365S229000, C365S222000

Reexamination Certificate

active

07460429

ABSTRACT:
A memory device responsive to standby mode commands for reducing internal operational power on a memory device is disclosed. The memory device includes a circuit for reducing power during a standby mode with the circuit including a reference with at least first and second reference signals. The circuit also includes a switching device for switching between the first and second reference signals in response to the standby mode command and further controls an internal operational power regulator to adjust between normal and low-power outputs further reducing the power to portions of the memory device.

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