Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2011-06-21
2011-06-21
Nguyen, VanThu (Department: 2824)
Static information storage and retrieval
Addressing
Sync/clocking
C365S233120, C327S156000, C327S262000, C327S295000
Reexamination Certificate
active
07965582
ABSTRACT:
Circuit and method for recovering clock data in highly integrated semiconductor memory apparatus includes a plurality of signal receiving units configured to receive signals through a plurality of input/output pads and transfer the signals according to a receiving reference clock, the signal receiving units being divided into groups, a plurality of phase detection units configured to detect phases of signals output from the groups of the signal receiving units, a plurality of phase detection control units configured to control the phase detection units so that the phase detection units sequentially detect the phases of the signals output from each of the groups of the signal receiving units and a notification unit configured to output signals output from the phase detection units.
REFERENCES:
patent: 6265996 (2001-07-01), Duffy
patent: 6535527 (2003-03-01), Duffy
patent: 2004/0172570 (2004-09-01), Miyajiri
patent: 2007/0222488 (2007-09-01), Bonaccio et al.
patent: 1999-0077790 (1999-10-01), None
patent: 2002-0050730 (2002-06-01), None
patent: 2007-0098713 (2007-10-01), None
Byeon Sang-Yeon
Choi Chang-kyu
Kim Kyung-hoon
Blakely & Sokoloff, Taylor & Zafman
Hynix / Semiconductor Inc.
Nguyen Hien N
Nguyen Vanthu
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