Pulse or digital communications – Synchronizers – Synchronization failure prevention
Reexamination Certificate
1999-11-29
2004-04-13
Fan, Chieh M. (Department: 2634)
Pulse or digital communications
Synchronizers
Synchronization failure prevention
C375S342000, C375S368000
Reexamination Certificate
active
06721378
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a circuit and method for receiving data and, in particular, but not exclusively to a circuit and method for receiving data suitable for use in a telecommunications network such as a mobile telecommunications network.
DESCRIPTION OF RELATED ART
In known arrangements where data is sent from one circuit to another circuit via a data bus, each of the two circuits has its own clock signal. The first clock signal is used by the transmitting circuit to clock the data onto the data bus. The second clock signal is used by the receiving circuit to clock the data from the data bus into, for example, a shift register. These two clock signals may have the same frequency. However, the effective phase difference between the clock signal of the transmitting circuit and the clock signal of the receiving circuit is unknown. This effective phase difference generally depends on two main factors. Firstly, there may be a phase difference between the clock signal of the transmitting circuit and the clock signal of the receiving circuit. Secondly, the transmission delay in the data bus between the transmitting circuit and receiving circuit will contribute to the effective phase difference. As the effective phase difference between the two clock signals of the two circuits is unknown, this can give rise to problems.
Generally, data from the transmitting circuit will be, clocked into the receiving circuit on the rising edge of the clock signal of the receiving circuit. If the data is clocked onto the data bus by the transmitting circuit using a clock signal which has the same frequency as the clock signal used by the receiving circuit, then the clock signal of the receiving circuit will effectively have the same frequency as the incoming data. If the receiving circuit tries to read the incoming data at points where transitions in signal level can occur, then the receiving circuit will be unable to reliably read the data from the transmitting circuit. For example, a “1” might be read as a “0” or vice versa. This is undesirable.
To deal with this problem, it has been proposed to use a clock signal in the receiving circuit which has twice the frequency of the clock signal used by the transmitting circuit. However, this complicates the circuitry and it is generally preferred that the clock signals of the transmitting circuit and the receiving circuit have the same frequency. It has also been proposed to use a handshaking protocol between the receiving circuit and the transmitting circuit. However, this has the disadvantage that the number of wires between the transmitting circuit and the receiving circuit needs to be increased. In some applications, this is undesirable as it can complicate the arrangement and lead to increased costs.
SUMMARY OF THE INVENTION
It is therefore an object of embodiments of the present invention to reduce or at least mitigate these problems.
According to a first aspect of the present invention, there is provided a circuit for receiving data comprising:
a first receiver means having input means for receiving said data and an input for receiving a first clock signal, whereby said data is clocked into said first receiver means by said first clock signal;
a second receiver means having input means for receiving said data and an input for receiving a second clock signal, said first and second clock signals having the same frequency and being phase shifted with respect to one another, whereby said data is clocked into said second receiver means by said second clock signal;
determining means for determining if at least one of said receiver means has correctly received said data; and
means for selectively enabling a first output of one of the receiver means in accordance with the determination made by said determining means.
By using two receiver means which both receive the input data using clock signals having the same frequency but phase shifted with respect to one another, the problems caused by the uncertainty in the effective phase difference between the received data and the clock signal of the receiving circuit can be avoided. In particular, if one receiver means is unable to correctly receive the data due to the effective phase shift between one clock signal and the received data being, for example, substantially zero (or n x 360° where n is an integer), the other receiver means should be able to receive the data correctly. It should be appreciated that in certain applications of the present invention, the solution provided is cost effective in that it avoids the need to increase the number of lines between the receiving circuit and a transmitting circuit. The costs and complexity associated with the provision of an additional receiving means may be minimal as compared to the situation where, for example, an additional line is required for a handshaking protocol.
Preferably said received data has half the frequency of the first and second clock signals so that one bit of data will be received in one clock cycle.
Preferably, one of the first and second clock signals is the inverse of the other of said first and second clock signals. This is particularly advantageous in that the two clock signals can be simply obtained using a common clock signal and for example an inverter. However, it should be appreciated that in certain embodiments of the present invention, the first and second clock signals may have a phase shift of other than 180°.
Preferably, the received data includes a known pattern and the determining means is arranged to determine if the data received by at least one of the receiver means includes said known pattern. This known pattern may be mixed in with the actual data to be transmitted. This provides an easy and simple way to check whether or not the data has been correctly received by the respective receiving circuit.
Preferably, said data includes data indicating the beginning of said data, said determining means being arranged to determine if the data received by at least one of said receiving means includes the data indicating the beginning of the data.
Preferably said determining means is arranged to determine if the data received by at least one receiver includes the known pattern only if the data indicating the beginning of data has been detected.
Preferably, the determining means comprises first comparison means connected to a second output of the first receiver means and second comparison means connected to a second output of the second receiver means. Where the received data includes a known pattern, the respective comparison means may compare the known pattern with the actual pattern received by the respective receiver means.
In one embodiment, the determining means is arranged to determine if one of the first and second receiver means has correctly received the data and said enabling means is arranged to enable the first output of said one of said first and second receiver means if the determining means determines that the data has been correctly received and to enable the first output of the other of said first and second receiving means if the determining means determines that the data has not been correctly received by said one receiver means. In one embodiment of the present invention, the data received by only one of the two receiver means is checked to see if it is correct. If that data is not correct, then the other receiver means may be automatically enabled. This has the advantage that the processing time required in order to determine which receiver means should be enabled can be reduced. It is also a reasonable assumption in certain embodiments of the present invention that if one receiver means has not correctly received the data, the other receiver means has correctly received that data.
In an alternative embodiment of the present invention, the determining means is arranged to determine if the other of the first and second receiver means has correctly received said data only if it is determined by the determining means that said one receiver means has not correctly received said data
Fan Chieh M.
Nokia Corporation
Squire Sanders & Dempsey L.L.P.
LandOfFree
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