Circuit and method for protocol header decoding and packet routi

Details Circuit and method for protocol header decoding and packet routi Circuit and method for protocol header decoding and packet routi

1997-08-07

2000-09-19

Dinh, Dung C.

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

370351, 370389, 370392, 370393, 370417, 34087013, 709250, G08C 1508

Patent

active

06122278&

ABSTRACT:
A digital delay line, comprising adjustable digital delay elements coupled in series, receives and buffers a packet bit stream. The outputs of selected adjustable digital delay elements are tapped for determining in parallel the destination address bits of the packet. The packet is routed at the end of the digital delay line to the destination indicated by the destination address bits.

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