Coded data generation or conversion – Digital code to digital code converters – To or from run length limited codes
Reexamination Certificate
2002-05-13
2003-11-11
Williams, Howard L. (Department: 2819)
Coded data generation or conversion
Digital code to digital code converters
To or from run length limited codes
C369S059190, C369S059170
Reexamination Certificate
active
06646575
ABSTRACT:
BACKGROUND OF THE INVENTION
A. Field of the Invention
The present invention relates to a circuit and method for protecting the run length in RLL (run-length-limited) code. More particularly, it relatives to a circuit for protecting the run length in RLL code to prevent the illegal run length in an EFM signal.
B. Description of the Related Art
In an optical reproducing and recording system, an EFM (eight-bit to fourteen-bit modulation) signal needs to satisfy the requirements for the minimum run length (minimum continuation length) and the maximum run length (minimum continuation length). As illustrative examples, the CD (Compact Disk) systems require the minimum run length of 3 T and the maximum run length of 11 T, and the DVD (Digital Versatile Disk) systems require the minimum run length of 3 T and the maximum run length of 14 T. When the run length of a received EFM signal is exceeded the aforementioned run length requirements, that is, the run length in the EFM signal is illegal and is mixed with noise so as to induce a malfunction. In general, the minimum run length in the EFM signal is 3 T, but the illegal run length in the EFM signal may be 2 T or 1 T. The illegal run length will be transited immediately to the error correction block of the system and will be corrected. However, if there're more illegal EFM signals to be transited to the error correction block, the performance of the system will be influenced seriously. Hence, a circuit for protecting the run length in RLL code is essential to prevent the illegal run length in the EFM signals.
FIG. 1
is a time chart according to U.S. Pat. No. 6,014,096 “Data decoding method and device”. The principle of the patent is described below. When there is an illegal run length in the EFM signal, the data decoding method is to measure the time measurement A between the preceding sampling edge of a sampling clock and the front edge of the RF signal and to measure the time measurement B between the next sampling edge of the sampling clock and the rear edge of the RF signal. And then, to correct the run length in the EFM signal sampled from the RF signal according to the time measurement A and B. If B is shorter than A, then correct the preceding sampled signals of the illegal run length in the EFM signal from “0” to “1”, and otherwise correct the following sampled signals of the illegal run length in the EFM signal from “1” to “0”. But this data decoding method doesn't follow the maximum likelihood criterion as known.
Another known method is a decoding method according to a Viterbi algorithm, which calculates all the total path metrics of each possibly ideal signal by taking account of various possibly ideal signal with the real RF signal reproduced from a recording medium, and retrieves the shortest one from all the total path metrics as a correct path, and then gets a correct EFM signal against the previous processing. As shown in
FIG. 2
, the Viterbi algorithm could obtain a correct EFM signal. But the Viterbi decoder of the aforementioned method has a drawback that needs to complicate its structure and to increase the hardware scale due to calculating all the total path metrics of possibly ideal signal in each path.
SUMMARY OF THE INVENTION
In view of the above-mentioned problems, an object of the invention is to provide a circuit for protecting the run length in RLL code to prevent the illegal run length in an EFM signal. When the illegal run length in the EFM signal is detected, the circuit generates a correct EFM signal based on a difference signal by comparing the front and rear reference signal of the EFM signal so as to prevent the illegal run length in the EFM signal.
To achieve the above-mentioned object, a circuit for protecting the run length in RLL code, and correcting the illegal run length in a EFM signal, the circuit comprising: a sampling unit for sampling an EFM signal by a sampling clock with higher frequency than the EFM signal, and generating a sampling signal; a detector for receiving the sampling signal, and detecting whether the run length in the EFM signal is illegal, and generating a control signal; a front reference signal generator for generating a front reference signal corresponding to the illegal EFM signal according to the control signal generated from the detector; a rear reference signal generator for generating a rear reference signal corresponding to the illegal EFM signal according to the control signal generated from the detector; a first difference signal generator for generating a first difference signal based on the front reference signal and the illegal EFM signal; a second difference signal generator for generating a second difference signal based on the rear reference signal and the illegal EFM signal; a comparator for generating a comparing signal based on the first difference signal and the second difference signal; and an output unit for outputting a correct EFM signal corrected from the run length in the illegal EFM signal according to the comparing signal.
REFERENCES:
patent: 6094408 (2000-07-01), Verboom
Hou Kuen-suey
Wu Wen-Yi
Media TEK Inc.
Williams Howard L.
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