Circuit and method for power-on reset

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

Reexamination Certificate

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C327S142000, C327S198000

Reexamination Certificate

active

11338202

ABSTRACT:
In a power-on reset circuit and a method of generating a power-on reset signal tolerant of variation of an ambient temperature, the power-on reset circuit includes a first power-on reset unit, a second power-on reset unit and a logic gate. The first power-on reset unit generates a first power-on reset signal that is activated at a first level of a power supply voltage at a first temperature, and is activated at a second level of the power supply voltage at a second temperature. The second power-on reset unit generates a second power-on reset signal that is activated at the second level at the first temperature, and is activated at the first level at the second temperature. The logic gate executes a logical disjunction operation or a logical conjunction operation of the first power-on reset signal and the second power-on reset signal and generates a third power-on reset signal.

REFERENCES:
patent: 6160429 (2000-12-01), Morrill
patent: 6204703 (2001-03-01), Kwon
patent: 6686783 (2004-02-01), Huang
patent: 6737884 (2004-05-01), Shigemasa et al.
patent: 6847240 (2005-01-01), Zhou
patent: 6914461 (2005-07-01), Kwon
patent: 6914462 (2005-07-01), Kim et al.
patent: 7081779 (2006-07-01), Kang
patent: 7161396 (2007-01-01), Zhou et al.
patent: 7199623 (2007-04-01), Kwon
patent: 2004/0012419 (2004-01-01), Kim et al.
patent: 2001 0127609 (2001-11-01), None
Vadasz et al., IEEE Transactions on Electron Devices, vol. ED-13, No. 12, Dec. 1966, pp. 863-866.
English Abstract, 2001.

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