Circuit and method for page addressing read only memory

Details Circuit and method for page addressing read only memory Circuit and method for page addressing read only memory

1987-02-17

1989-05-16

Heckler, Thomas M.

Boots, shoes, and leggings

36424531, 3642543, G06F 1208

Patent

active

048315222

ABSTRACT:
A circuit and method for page addressing computer read-only memory (ROM) includes expanded ROM (12 and 13) and an address signal generator (20). Address signal generator (20) includes address line generator (21) for providing sufficient additional binary lines to expanded ROM (12 and 13) for addressing the entire expanded ROM memory space and a decoder circuit (22) for detecting the presence of prechosen addresses on the computer system address bus. The prechosen addresses permit selection of page increments in expanded ROM memory space for addressing over the more limited system address bus received by the original ROM.

REFERENCES:
patent: 3553653 (1971-01-01), Krock
patent: 3737860 (1973-06-01), Sporer
patent: 3970999 (1976-07-01), Elward
patent: 4158227 (1979-06-01), Baxter et al.
patent: 4164786 (1979-08-01), Gollomp
patent: 4368515 (1983-01-01), Nielsen
patent: 4592011 (1986-05-01), Mantellina
Intel Corporation, Intel 1987 Memory Components Handbook, pp. 4-93-4-107; 4-119-4-131; and 4-149-4-178 (1987).

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