Circuit and method for normalizing and rounding...

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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Reexamination Certificate

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07062525

ABSTRACT:
For use in a floating-point unit that supports floating-point formats having fractional parts of varying widths and employs a datapath wider than the fractional parts, a circuit and method for normalizing and rounding floating-point results and processor incorporating the circuit or the method. In one embodiment, the circuit includes: (1) left-shift circuitry for aligning a fractional part of the floating-point result with a most significant bit of the datapath and irrespective of a width of the fractional part to yield a shifted fractional part and (2) rounding circuitry, coupled to the shift circuitry, that rounds the shifted fractional part.

REFERENCES:
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patent: 5568412 (1996-10-01), Han et al.
patent: 5761103 (1998-06-01), Oakland et al.
patent: 6085208 (2000-07-01), Oberman et al.
patent: 6148314 (2000-11-01), Matheny et al.
patent: 6415308 (2002-07-01), Dhablania
patent: 6785701 (2004-08-01), Park et al.

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