Circuit and method for implementing the advanced encryption...

Cryptography – Communication system using cryptography – Time segment interchange

Reexamination Certificate

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C380S042000, C380S028000, C380S255000, C713S168000

Reexamination Certificate

active

06937727

ABSTRACT:
A circuit includes a single circuit portion for implementing the Advanced Encryption Standard (AES) block cipher algorithm in a system having a plurality of channels. The circuit portion includes a circuit for individually generating, on the fly, the round keys used during each round of the AES block cipher algorithm. The circuit portion also includes shared logic circuits that implement the transformations used to encrypt and decrypt data blocks according to the AES block cipher. The single circuit portion encrypts or decrypts data blocks from each of the plurality of system channels in turn, in round-robin fashion. The circuit portion also includes a circuit for determining S-box values for the AES block cipher algorithm. The circuit additionally implements an efficient method for generating round keys on the fly for the AES block cipher decryption process.

REFERENCES:
patent: 5956405 (1999-09-01), Yuval
patent: 6185679 (2001-02-01), Coppersmith et al.
patent: 2002/0051534 (2002-05-01), Matchett et al.
patent: 2002/0191793 (2002-12-01), Anand et al.
patent: 197 24 072 (1998-10-01), None
patent: 002219874 (2001-10-01), None
Joan Daemen, Vincent Rijmen; Aes Proposal: Rijndael; Mar. 9, 1999, Version 2.
“The Advanced Encryption Standard (Rijndael)” visited Jan. 26, 2001, <http://home.ecn.ab.ca/˜isavard/crypto/co040801.htm>.

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