Circuit and method for high-speed execution of modulo division

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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C708S491000

Reexamination Certificate

active

09971949

ABSTRACT:
A division operation is simulated by performing multiple subtractions, in parallel, each of which represents the subtraction of a different multiple of the divisor from the dividend. Each subtraction produces a possible remainder value, but only one subtraction will result in a valid remainder—the one representing the divisor multiplied by the actual quotient that would result from the division operation—and that remainder is then identified as the modulo output of the division operation.

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