Circuit and method for generating multiphase clock

Details Circuit and method for generating multiphase clock Circuit and method for generating multiphase clock

1999-05-25

2000-10-24

Lam, Tuan T.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

327141, 327156, 327158, G06F 104

Patent

active

061373362

ABSTRACT:
A multiphase clock generating circuit having: a clock generating section for generating N-phase clock signals of number N which have a frequency nearly equal to that of input clock signal and whose phases are sequentially shifted by 360 degrees/N; an input side M-division circuit that divides the frequency of the input clock signal by M, outputting a reset signal to the clock generating section; an output side M-division circuit that is fed with a delayed reset signal that the reset signal output from the clock generating section is accompanied with a predetermined delay, and, synchronized with the delayed reset signal, divides the frequency of output clock signal output from the clock generating section by M; and a controller for comparing the input side M-division clock and the output side M-division clock, and controlling a delay amount of the clock generating section based on the comparison result.

REFERENCES:
patent: 5146585 (1992-09-01), Smith, III
patent: 5568078 (1996-10-01), Lee
patent: 5844436 (1998-12-01), Altmann
patent: 5867332 (1999-02-01), Mattison

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