Circuit and method for generating a read reference signal for no

Details Circuit and method for generating a read reference signal for no Circuit and method for generating a read reference signal for no

1997-06-18

1998-09-08

Mai, Son

Static information storage and retrieval

Floating gate

Particular biasing

36518521, G11C 1606

Patent

active

058055002

ABSTRACT:
The current flowing through a cell to be read, forming part of a nonvolatile memory array and presenting a characteristic with a predetermined slope, is amplified N times and compared with a reference current presenting a two portion characteristic: a first portion extending between a predetermined threshold value and a trigger value, and presenting a slope equal to that of the memory cell characteristic, and a second portion extending from the trigger value, and presenting a slope amplified N times with respect to that of the cell characteristic and therefore equal to the amplified slope of the cell.

REFERENCES:
patent: 5386388 (1995-01-01), Atwood et al.
patent: 5541880 (1996-07-01), Compardo et al.
patent: 5563826 (1996-10-01), Pascucci et al.
patent: 5654918 (1997-08-01), Hammick
patent: 5699295 (1997-12-01), Yero
patent: 5717640 (1998-02-01), Hashimoto

Affiliated with

Also associated with

Rating

Circuit and method for generating a read reference signal for no does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Circuit and method for generating a read reference signal for no, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit and method for generating a read reference signal for no will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1289632