Circuit and method for generating a power-on reset signal

Details Circuit and method for generating a power-on reset signal Circuit and method for generating a power-on reset signal

1997-03-27

1999-09-28

Tran, Toan

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

327142, 327198, H03L 700

Patent

active

059594764

ABSTRACT:
The circuit, integrated in a device, includes a generating stage generating a POR pulse and a bump detector detecting bump conditions on the common supply line and enabling the generating stage in the presence of a bump. A bump supply line is connected to a holding capacitor and to the common supply line via an isolation stage. The isolation stage connects the common supply line and the bump supply line in the absence of a bump, and isolates the bump supply line in the presence of a bump. The bump detector is connected to the common supply line and to the bump supply line to generate the POR pulse when the common supply line falls beyond a given level below the voltage of the bump supply line. The circuit is also used to generate a POR pulse in the presence of a low supply voltage and when the device is turned off, to ensure correct operation of the device.

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Patent abstracts of Japan, vol. 8, No. 63 (E-233), Mar. 24, 1984 & JP-A-58 210769 Masateru Dec. 8, 1983.

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