Circuit and method for filtering voltage spikes

Details Circuit and method for filtering voltage spikes Circuit and method for filtering voltage spikes

1994-03-21

1995-11-21

Chin, Stephen

Pulse or digital communications

Receivers

Interference or noise reduction

375238, 375346, H04B 110

Patent

active

054694760

ABSTRACT:
A spike filter circuit (11) has an input (12) for receiving an input signal comprising data bits and an output (13) for providing a filtered output signal. A data bit is characterized by a voltage magnitude and a minimum time period. The spike filter circuit (11) filters out any signal applied to the input (12) that has a period less than the minimum time period of a data bit. The spike filter circuit comprises a pulse width sense circuit (14), a Schmitt trigger (16), and a delay circuit (17). The pulse width sense circuit (14) is responsive to the input signal and filters out signals having a period less than the minimum time period of a data bit. The Schmitt trigger (16) is responsive the pulse width sense circuit (14), has predetermined threshold voltages to increase noise immunity, and buffers the output of the pulse width sense circuit (14). The delay circuit (17) is responsive to the filtered output signal and provides a signal delayed by a predetermined time to a feedback input of the pulse width sense circuit (14). The signal provided by the delay circuit (17) inhibits the pulse width sense circuit (14) from sensing a data bit (having an opposite logic level to that at the output (13)) for the delay of the predetermined time of the delay circuit (17).

REFERENCES:
patent: 3644677 (1972-02-01), Cecchin et al.
patent: 5343496 (1994-08-01), Honig et al.

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