Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2002-08-06
2004-12-14
Mengistu, Amare (Department: 2673)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S099000
Reexamination Certificate
active
06831622
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a driving circuit for driving an electro-optical panel that is free from image quality degradation due to noise, a driving method for driving the electro-optical panel, an electro-optical device, and electronic equipment.
2. Description of the Related Art
Conventional electro-optical devices, such as an active-matrix type liquid-crystal display device, include a liquid-crystal panel and a video processing circuit. The liquid-crystal panel is mainly formed of an element substrate having a matrix of pixel electrodes arranged thereon, a counter substrate having a counter electrode and a color filter arranged thereon, and a liquid crystal encapsulated between the two substrates.
A pixel electrode is arranged at an intersection of a scanning line and a data line, and is connected to a switching element such as a transistor. When a selection signal is applied to a switching element through a scanning line, the switching element becomes conductive. When a video signal is applied to the pixel electrode through the data line during the conductive state of the switching element, a charge responsive to a voltage of the video signal is stored in the liquid crystal layer between the pixel electrode and the counter electrode. When the switching element is turned off subsequent to the storage of charge, the charge is maintained in the liquid crystal layer if the resistance of the liquid crystal layer is high enough. If the amount of charge stored is controlled by driving each switching element, the liquid crystal changes the alignment state thereof from pixel to pixel, and required information is thus presented.
It suffices to store charge in the liquid crystal layer in each pixel during a portion of the time. First, a scanning line driving circuit successively selects scanning lines one by one. Second, a data line driving circuit outputs a sampling signal (pulse) to successively select one or a plurality of data lines at a time. Third, a video signal fed through a video signal line is sampled in response to the sampling signal, and is then fed to a corresponding data line. In this way, time-division multiplex driving is performed in which scanning lines and data lines are shared by a plurality of pixels.
If the sampling signals (pulses), which need to be output in an exclusive manner, overlaps each other in the output thereof for any reason, a video signal which is intended for a given data line happens to be sampled for an adjacent data line. Image quality is thus degraded. To resolve such an image degradation, a so-called enable circuit is arranged in an output stage of the data line driving circuit so that the pulse width of the sampling signal is narrowed to the pulse width of the enable pulse. The enable circuit prevents consecutive sampling signals from overlapping each other in time.
A video signal processor circuit generates a video signal by performing processes, such as a gamma correction and an amplification and inversion process, on an input video signal. The video signal processor and the liquid-crystal panel are connected to each other through an FPC (Flexible Printed Circuit), and the video signal is thus sent to the liquid-crystal panel through the FPC.
SUMMARY OF THE INVENTION
Since the pitch of wiring becomes finer in the liquid-crystal panel and the operation frequency of the liquid-crystal panel becomes higher along with a higher definition of a display screen, the delay of an enable pulse with respect to a video signal becomes a problem. The liquid-crystal panel is supplied with the enable signal, etc., via signal lines formed on a glass substrate. Since parasitic capacitance and resistance on the glass substrate are higher than those in the FPC, the liquid-crystal panel is subject to signal delay.
The enable pulse must be supplied in synchronization with the video signal. In the liquid-crystal panel, the supply route of the enable pulse and the supply route of the video signal are different. Even if the enable pulse synchronized with the video signal is fed to the liquid-crystal panel, therefore, the enable pulse is out of phase with the video signal in the liquid-crystal panel. The problem arises with a sampling signal for appropriately sampling the video signal.
The liquid-crystal panel is typically controlled by a variety of timing signals obtained through the digital process. The timing signal, which is a digital signal, includes a high-frequency component, and is synchronized with the video signal. For this reason, the timing signal contains a large amount of high-frequency components at the rising edge thereof and the falling edge thereof. Noise synchronized with the level shifting of the timing signal overlaps an analog video signal.
If noise is superimposed on the video signal, a voltage different from the original component thereof is sampled, and applied to the pixel electrode. Superimposed noise is then recognized as a vertical streak, thereby degrading image quality. Along with a compact design of the device, a step of controlling noise is an urgent need in view of a high-density circuit substrate and FPC substrate.
The present invention has been developed in view of the above problem, and it is an object of the present invention to provide a driving circuit for driving an electro-optical panel which generates an appropriate sampling signal and is free from degradation in image quality even if an enable pulse is out of phase with a video signal and even if noise is superimposed on the video signal, and to provide a method for driving the electro-optical panel, an electro-optical device, and electronic equipment.
A driving circuit of the present invention for driving an electro-optical panel having a transistor and a pixel electrode at each intersection of each of a plurality of scanning lines and each of a plurality of data lines, includes a scanning line driving circuit which selects a scanning line to supply a transistor corresponding to the selected scanning line with a signal to turn on the transistor, a data line driving circuit which generates a shift pulse to select a data line within a duration during which the scanning line is selected, and limits the pulse width of the shift pulse to the pulse width of an enable pulse narrower than the shift pulse width and outputs the shift pulse with the narrow pulse width as a sampling signal, a sampling circuit which samples a video signal within the pulse duration of the sampling signal and feeds the sampled signal to at least one data line, a dummy circuit which is arranged adjacent to the sampling circuit and the data line driving circuit, and outputs a phase difference signal representing a phase difference between a monitor signal supplied in synchronization with the video signal and a reference pulse supplied in synchronization with the enable pulse, and an enable pulse adjustment circuit which adjusts the phase of the enable pulse so that the phase of the enable pulse leads with respect to the video signal when the phase difference signal indicates that the reference pulse lags the monitor signal in phase, or so that the phase of the enable pulse lags with respect to the video signal when the phase difference signal indicates that the reference pulse leads the monitor signal in phase. When the reference signal synchronized with the enable pulse is delayed with respect to the monitor signal in this arrangement, the phase of the enable pulse is adjusted to cancel out the delay.
In the above driving circuit, the dummy circuit preferably includes an element identical to that which is also used in the sampling circuit and the data line driving circuit as portions thereof. In this arrangement, the delay occurring in the supply route of the enable pulse is accurately simulated.
Preferably, in the above driving circuit, the enable pulse adjustment circuit repeatedly alternates between delaying and advancing the enable pulse in phase within a predetermined range with respect to a target value. Since the phase of the enable si
Mengistu Amare
Oliff & Berridg,e PLC
Patel Nitin
Seiko Epson Corporation
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