Computer graphics processing and selective visual display system – Computer graphics processing – Attributes
Reexamination Certificate
1998-12-28
2003-09-02
Brier, Jeffery (Department: 2672)
Computer graphics processing and selective visual display system
Computer graphics processing
Attributes
C345S600000, C345S698000, C345S003300
Reexamination Certificate
active
06614448
ABSTRACT:
BACKGROUND OF THE INVENTION
A personal computer
100
(
FIG. 1A
) includes a graphics processor
104
that generates a display of a three-dimensional (abbreviated as “3D”) image on a screen
101
under the control of a central processing unit
105
. Graphics processor
104
forms the displayed image from descriptions of one or more graphics primitives, such as a triangle
106
(
FIG. 1B
) that covers a picture element (called “pixel”)
107
. The image displayed on screen
101
is typically formed by a two-dimensional array of such pixels, each of which has color.
Graphics processor
104
changes the color of pixel
107
depending on the location of triangle
106
relative to the center
108
of pixel
107
. In the example illustrated in
FIG. 1B
, center
108
falls outside of triangle
106
, and graphics processor
104
leaves the attributes of pixel
107
unchanged. However, when center
108
falls inside triangle
106
, pixel
107
is colored the color of triangle
106
. One pixel (e.g. pixel
113
) being fully colored (triangle's color) while an adjacent pixel (e.g. pixel
107
) being not colored results in a defect noticeable to the human eye, in a problem called “aliasing.”
The aliasing problem is reduced (or even eliminated) when fractional coverage of a pixel by a triangle (or other primitive) causes a change in the color displayed for the pixel by a corresponding fractional amount. Such fractional change of a pixel's color requires obtaining multiple samples of colors for each pixel, in a process called “multisampling.” For example, four colors (also called “multisamples”) can be produced from rasterization (a well known process), one for each of four locations A-D (
FIG. 1C
) within pixel
107
(instead of just one location
108
as described above).
Graphics processor
104
treats each multisample as a miniature pixel throughout the whole rendering process. At the point of display, processor
104
averages the four multisamples to obtain an averaged color, and displays the pixel at the averaged color (also called “resolve color”). For example, a pixel
109
(
FIG. 1D
) has two multisamples covered by triangle
106
and two other multisamples covered by triangle
110
. Therefore pixel
109
is displayed at an equal blend of the colors of triangles
106
and
110
. For clarity, the four multisamples of each of various pixels (e.g. pixels
109
and
112
) are not labeled. If triangle
106
is green and triangle
110
is red, then pixel
109
is displayed in a greenish-red color. Similarly, another pixel
112
(
FIG. 1E
) has three multisamples covered by triangle
106
and a fourth multisample covered by triangle
111
, and is therefore displayed at a color that is three quarters red and one quarter black (if triangle
111
is black).
Another type of aliasing occurs when there is insufficient resolution (also called “depth”) in the color signal used to display the image on screen
101
(FIG.
1
A). For example, when the displayed image includes a color ramp going from left to right, with red on the left and green on the right, if there is sufficient color resolution the color of the displayed image changes gradually and smoothly along the horizontal axis. However, if there is insufficient color resolution, vertical bands of different colors are noticeable. Color resolution depends on the number of bits used in a signal used to identify the color, such as 24 bits (wherein each of red, green and blue signals are stored in 8 bits) or 16 bits (wherein red and blue signals are stored in 5 bits each and green signal is stored in 6 bits). At the minimum color resolution, the color signal has just 3 bits (1 bit for each of red, green and blue), and vertical bands are clearly noticeable when a color ramp is displayed.
If n multisamples are used for each pixel, and 24 bits are used to store the color signal for each multisample, each pixel requires 24*n bits (e.g. 96 bits when n is 4). The just-described examples 96 bits is an insignificant amount of memory if processor
104
only processes one pixel at a time. However, a significant amount of memory is required outside processor
104
, e.g., in a frame buffer implemented by a DRAM. In a “tiled” architecture, screen
101
(
FIG. 1A
) is subdivided into rectangular areas (called “tiles”), and processor
104
must process, at any one time, all the pixels in such an area. Such an area can be, for example, 32 pixels tall and 32 pixels wide, thereby requiring processor
104
to have a minimum of 32*32*96 bits (i.e. 12 KB) of memory. If the number of multisamples or the number of bits for color resolution is increased, the amount of memory required is also increased.
SUMMARY OF THE INVENTION
A graphics processor in accordance with this invention displays pixels in an image using signals having resolution that is non-uniform across the image. In one embodiment, the graphics processor uses signals having a first resolution (also called “higher resolution”) in the interior of a surface in the image, and signals having a second resolution (also called “lower resolution”) at edges (also called “discontinuities”) of the surface. The just-described signals can be any signals in a graphics processor that indicate a predetermined attribute, such as color.
Use of higher resolution of a color signal in the interior of a surface eliminates color aliasing (also known as “mach banding”) that would otherwise occur in the interior if the interior were displayed at the lower resolution. At the discontinuities, use of multisamples having lower resolution of color or even discarding color in favor of luminance is not noticeable to the human eye when a pixel obtained from such multisamples is displayed. Such use of signals having two or more widths (in the form of resolutions in this example) allows the graphics processor to use one or more multisample signals at a lower resolution than the prior art, thereby reducing hardware (e.g. memory locations required to store such signals, and lines required to route such signals).
In one embodiment of the invention, a processor (not necessarily a graphics processor) includes a resolution reducer and a resolution enhancer that respectively reduce and enhance the resolution (and therefore the number of bits) of a signal that is to be stored or transmitted within the processor. Specifically, the resolution reducer reduces the resolution of a high resolution signal to generate a low resolution signal while maintaining another high resolution signal unchanged. Thereafter, the processor performs in one or more intermediate circuits various actions (such as storage and/or transmission) on the high and low resolution signals. An example of an intermediate circuit is a memory that stores the high and low resolution signals in two storage circuits wherein one of the storage circuits has fewer number of storage locations than the other of the storage circuits.
Next, the resolution enhancer enhances the low resolution signal to generate a signal (called “enhanced resolution signal”) having the same number of bits as the high resolution signal. Thereafter, the processor uses the enhanced resolution signal in the normal manner, e.g. uses an enhanced color signal (that is obtained by enhancing a low resolution color signal) to display an image. An enhanced resolution signal of the type described herein is provided to any circuit that normally receives the high resolution signal, e.g. provided to a rendering stage in a pipeline of a graphics processor.
In one embodiment, a resolution reducer includes a truncator that simply drops a predetermined number of least significant bits (also called “low order bits”) of a high resolution signal to generate the low resolution signal. Thereafter, the unchanged (high) resolution signal and the changed (low) resolution signal are both processed within the processor in a manner similar or identical to one another, e.g. both stored and/or both transmitted. Note that the low resolution signal of this embodiment can be directly displayed (in the normal manner) if necessary, without an
Garlick Benjamin J.
Hutchins Edward A.
Brier Jeffery
Chung Daniel
Nvidia Corporation
Townsend and Townsend / and Crew LLP
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