Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2006-12-19
2008-11-11
Tran, Michael T (Department: 2827)
Static information storage and retrieval
Addressing
Sync/clocking
C365S230060
Reexamination Certificate
active
07450464
ABSTRACT:
A circuit for detecting synchronous mode in a semiconductor memory apparatus includes a control unit that controls the driving of a clock according to whether or not a valid address signal is enabled. A driving unit drives the clock according to the control of the control unit. A latch unit latches the clock driven by the driving unit and outputs a synchronous mode signal.
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Hynix / Semiconductor Inc.
Kaminski Jeffri A.
Tran Michael T
Venable LLP
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