Circuit and method for data alignment

Details Circuit and method for data alignment Circuit and method for data alignment

2007-12-12

2009-10-20

Williams, Howard (Department: 2819)

Coded data generation or conversion

Digital code to digital code converters

Serial to parallel

C341S101000, C327S415000

Reexamination Certificate

active

07605726

ABSTRACT:
A circuit for data alignment includes a first latch unit and a second latch unit. The first latch unit latches serial input data by using a plurality of first clocks with different phases and the same frequency to output latched data. The second latch unit latches the data from the first latch unit by using a plurality of second clocks with a lower frequency than the first clocks and more diverse phases to thereby output parallel data.

REFERENCES:
patent: 4079456 (1978-03-01), Lunsford et al.
patent: 5721545 (1998-02-01), Poplevine
patent: 5726990 (1998-03-01), Shimada et al.
patent: 6177891 (2001-01-01), Nakamura
patent: 6696995 (2004-02-01), Foley et al.
patent: 1020020086197 (2002-11-01), None

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