Circuit and method for controlling the slew rate of the...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Slope control of leading or trailing edge of rectangular or...

Reexamination Certificate

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C327S103000, C327S134000, C327S540000, C327S543000

Reexamination Certificate

active

06194935

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to a circuit for controlling the slew rate of the output voltage of a driver in a push-pull configuration.
2. Background of the Relevant Art
It is important to be able to control the slew rate of the output signal of a driver so that the edge transitions of the output signal are neither too fast nor too slow, in order to ensure accurate control of the output waveform as the load connected to the driver varies.
In particular, for RS232 serial interfaces, for example, the load is of the ohmic-capacitive type.
When operating at data rates on the order of 100 kbps, it is important to be able to precisely control the slew rate of the output signal of the driver in order to ensure a desired data transmission rate.
A known solution for controlling the slew rate of the output signal of a driver is shown in
FIG. 1
, wherein the input signal Tin of the driver is input to a first positive boost circuit
1
, which boosts the signal Tin to the voltage V+ obtained from a charge pump circuit, and is also input to a second negative boost circuit
2
, which pulls the level of the signal Tin down to the level V− by inverting the voltage obtained from the charge pump circuit.
Two capacitors C
1
and C
2
are respectfully connected between the output signal Tout of the driver and gate terminals of a PMOS transistor P
1
and of an NMOS transistor N
1
. The gate or control electrode of transistors P
1
and N
1
are respectively connected to the output of positive boost circuit
1
and negative boost circuit
2
. Transistors P
1
and N
1
form the final stage of the known driver circuit.
The load, of the ohmic-capacitive type and designated by the reference numeral
3
, is driven by the output signal Tout.
The known driver circuit is not without its shortcomings.
First, in order to be able to use capacitors C
1
and C
2
, whose capacitances are not excessively high, the connection thereof between the output terminal and the gate terminal of their corresponding final stage transistor is able to exploit the Miller effect stemming from the amplification provided by final stage transistors P
1
and N
1
. Because it is impossible to provide precise control of the amplification of final stage transistors P
1
and N
1
, the control over the slew rate of output signal Tout is imprecise.
In operation, when the final stage transistor P
1
is on, the transistor N
1
is off. Accordingly, the capacitor C
2
that intervenes during the rising edge of the output signal Tout is subjected to a potential difference given by
V
2
=(V+)−Vds(P
1
)−(V−),
where V
2
is the voltage across capacitor C
2
and Vds(P
1
) is the voltage between the drain terminal and the source terminal of the transistor P
1
.
On the contrary, in the second mode wherein the transistor P
1
is in the off state and the transistor N
1
in the on state, the capacitor C
1
is subjected to a potential difference given by
V
1
=(V+)−[(V−)+Vds(N
1
)],
where V
1
is the voltage across capacitor C
1
and Vds(N
1
) is the voltage between the drain terminal and the source terminal of the transistor N
1
.
In the context of the known driver being part of an RS232 serial interface, the difference in voltage between V+ and V− is high and it is therefore necessary to use high-voltage capacitors for capacitors C
1
and C
2
. Consequently, the area occupied by the capacitors C
1
and C
2
in an integrated circuit chip substantially increases.
Further, the charging and discharging currents for the two capacitors C
1
and C
2
cannot be accurately controlled, since they are respectively coupled to the output of the positive and negative boost circuits
1
and
2
.
SUMMARY OF THE INVENTION
Based upon the foregoing, the aim of the present invention is to provide a circuit for controlling the slew rate of the output of a driver in a push-pull configuration which maintains the slew rate within a predetermined interval even when the temperature varies.
The present invention provides a circuit for controlling the slew rate of the output of a driver in a push-pull configuration having reduced area with respect to known driver circuits in order to be integrated in a wide variety of applications.
The circuit controls the slope of the rising and falling transitions of the output signal of a driver independently of each other.
The circuit controls the slew rate of the output of a driver in a push-pull configuration in which the short-circuit currents can be controlled in a simple manner, thereby eliminating the need for additional circuits.
The present circuit for controlling the slew rate of the output of a driver in a push-pull configuration is relatively highly reliable and relatively easy to competitively manufacture.
This aim and others which will become apparent hereinafter are achieved by a circuit for controlling the slew rate of the output of a driver in a push-pull configuration, including a current generator for generating a pair of currents and a switching circuit which drives the current generator and is in turn driven by an input signal of the driver. The present circuit further includes at least one capacitor that is selectively charged and discharged according to the current generator so as to generate a first signal having a predetermined slew rate. The present circuit also includes a converter circuit for converting the first signal into at least one controlled current signal for driving the final stage of the driver. The resulting output signal of the driver has a slew rate which is substantially accurately controlled and is based upon the slew rate of the first signal.


REFERENCES:
patent: 5387882 (1995-02-01), Schoofs
patent: 5736888 (1998-04-01), Sharpe-Geisler
patent: 5742193 (1998-04-01), Colli et al.
patent: 5754078 (1998-05-01), Tamagawa
patent: 5828245 (1998-10-01), Brambilla et al.
patent: 0457595 (1991-11-01), None
patent: 0492506 (1992-07-01), None
EPO Form 1507.0 dated Apr. 20, 1999 for European Application No. 98830679.1.

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