Circuit and method for controlling an output of a ring...

Oscillators – Ring oscillators

Reexamination Certificate

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Details

C331S034000, C327S276000, C327S281000, C323S313000

Reexamination Certificate

active

06275117

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to voltage controlled oscillators (VCOs) generally and, more particularly, to a circuit and method for improving the analog swing of a ring oscillator.
BACKGROUND OF THE INVENTION
In a VCO, there is a ring oscillator that generates two differential analog signals that are presented to a comparator. The comparator converts the differential analog signals to CMOS levels. Referring to
FIG. 1
, a diagram of a circuit
10
is shown illustrating such a conventional VCO. The circuit
10
comprises a pump-up circuit
12
, a pump-down circuit
14
and a VCO circuit
16
. The VCO circuit
16
comprises a ring oscillator
18
and an analog-to-digital CMOS converter circuit
20
. The signals A and Ab are converted to clock signals CLK and CLKb by the circuit
20
.
Referring to
FIG. 2
, a more detailed diagram of a ring oscillator stage
18
is shown. The ring oscillator stage
18
comprises a transistor
21
, a transistor
22
, a transistor
24
, a voltage controlled resistor (VCR)
26
and a VCR
28
. The delay in the ring oscillator stage
18
is proportional to the capacitance and the impedance on nodes B and Bb. The ring oscillator
18
can have a number of stages (e.g., the number of stages can be N, 2N, 2N+1, etc.).
Referring to
FIG. 3
, a more detailed diagram of the conventional one leg of a ring oscillator stage
29
is shown. The leg
29
comprises a current source
30
, a transistor
32
, and a VCR
26
(or
28
). The VCR comprises a transistor
34
and a transistor
36
. When a control voltage (i.e., Vcontrol) presented to the transistor
34
is at a low voltage, the transistor
34
may be in a saturation mode. When the transistor
36
is cut off, the impedance at the drain node D will be very high, which can hinder proper and stable oscillation of the oscillator.
The voltage controlled resistor
26
controls the delay in each ring oscillator stage which, in turn, determines the frequency of oscillation of the output signal OUT.
FIG. 3
illustrates a conventional approach where the VCR
26
consists of two transistors (i.e., transistor
34
and
36
). As the control voltage Vcontrol increases, the impedance of the transistor
34
decreases, which reduces the delay in the particular stage and increases the frequency of oscillation of the VCO. The transistor
36
helps the oscillation at low control voltages when the transistor
34
is cut-off or at high control voltages when the transistor
34
is in saturation.
When the transistor
34
is in saturation and the transistor
36
is cut-off, the drain node D will see a high impedance. This may adversely affect oscillation and reduce the oscillation swing of the ring oscillator
18
. Also, when the transistor
34
is cut-off, the node D will not properly oscillate, because it needs to be greater than the threshold voltage (i.e., VTNMOS) to turn on the transistor
36
.
SUMMARY OF THE INVENTION
The present invention concerns a circuit and method configured to generate a variable impedance. The circuit may comprise a voltage controlled resistor configured to generate the variable impedance in response to (i) a first transistor configured to receive a first control signal and (ii) a bias transistor configured to receive a bias signal. In one example, the variable impedance may be generated in further response to a clamp transistor.
The objects, features and advantages of the present invention include providing a circuit a method for controlling an output of a ring oscillator stage that (i) improves the analog swing on the VCO, (ii) provides stable oscillation and (iii) reduces VCO gain variation.


REFERENCES:
patent: 5446417 (1995-08-01), Korhonen et al.
patent: 5495207 (1996-02-01), Novof
patent: 5563553 (1996-10-01), Jackson

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