Circuit and method for addressing multiple rows of a display...

Details Circuit and method for addressing multiple rows of a display... Circuit and method for addressing multiple rows of a display...

2005-11-22

2005-11-22

Chang, Kent (Department: 2675)

Computer graphics processing and selective visual display system

Plural physical display element control system

Display elements arranged in matrix

C345S100000

Reexamination Certificate

active

06967638

ABSTRACT:
A row addressing circuit and method for addressing multiple rows of a visual display in a single cycle. The circuit comprises: a decoder coupled to a plurality of signal lines, wherein the decoder includes a system for decoding a row select address, a first pre-write address and a second pre-write address and selecting three corresponding signals lines during the single cycle; and wherein each of the plurality of signal lines is further coupled to a dedicated set of latches, wherein each set of latches includes a row select latch, a first pre-write latch, and a second pre-write latch.

REFERENCES:
patent: 6034921 (2000-03-01), Viot et al.
patent: 6738036 (2004-05-01), Janssen et al.

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