Boots – shoes – and leggings
Patent
1988-04-15
1990-01-09
Clark, David L.
Boots, shoes, and leggings
G06F 752
Patent
active
048932680
ABSTRACT:
A circuit for use in conjunction with a multiplier receives a portion of completed product bits and a portion of sum and carry bits which, when accumulated, provide a complete output product operand. The circuit is adaptable for use with input operands having single or double precision data formats. The accumulation time required depends upon which data format mode the circuit is operating in.
REFERENCES:
patent: 3569685 (1971-03-01), Chesley
patent: 4484301 (1984-11-01), Borgerding et al.
patent: 4722068 (1988-01-01), Kuroda et al.
patent: 4754421 (1988-06-01), Bosshart
Alsup Mitch K.
Denman, Jr. Marvin A.
Young John M.
Clark David L.
King Robert L.
Motorola Inc.
Shaw Dale M.
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