Circuit and a method for selecting the kappa greatest data in a

Details Circuit and a method for selecting the kappa greatest data in a Circuit and a method for selecting the kappa greatest data in a

1994-06-28

1995-05-30

Harrell, Robert B.

Boots, shoes, and leggings

364DIG1MSFile, 364DIG2MSFile, 364259, 364947, G06F 724

Patent

active

054210100

ABSTRACT:
A method for sorting the k greatest ones of a sequence of n incoming data values, by: a) sequentially writing each data value into one of n one-word memories, in a word format which includes, in decreasing weight order, the following bits: a first inhibition bit (MI), a second selection bit (MS), third data bits (MD), and fourth bits (MP) representative of the position of the incoming datum; b) setting the first bits (MI) of the n words during the arrival of the first signal; c) while writing each data value, resetting the first (MI) and second (MS) bits of the corresponding word; and d) between the arrivals of the (n-k).sup.th datum and n.sup.th datum, detecting the smallest word stored in the memories and setting its second bit (MS).

REFERENCES:
patent: 4317182 (1982-02-01), Takase et al.
Patent Abstracts of Japan, vol. 015, No. 121 (E-1049) Mar. 25, 1991.
"A Bit-serial Device for Extracting a Vector Element of a Specified Rank", C. K. Yuen, Digital Processes, vol. 6, No. 2-3, 1980, pp. 207-210.

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