Excavating
Patent
1995-05-01
1998-04-14
Beausoliel, Jr., Robert W.
Excavating
371 23, 364578, 364489, G06F 1300
Patent
active
057403473
ABSTRACT:
A method, apparatus and medium containing a computer program for analyzing timing in circuits. In one embodiment, the invention sets the direction of elements of a circuit by partitioning the circuit to identify a subcircuit including a pullup or pulldown block, then modeling the subcircuit as a single transistor, then setting the direction of that single transistor and then propagating the direction of that single transistor to other elements of the subcircuit. In another embodiment, the invention generates a gray box model by searching paths from a primary clock input of a circuit, determining worst and best paths among the multiple elements of the circuit and incorporating the best and worst path information in the gray box model. In another embodiment, the invention instantiates such a gray box model in a second circuit and performs timing checks on this second circuit.
REFERENCES:
patent: 4601032 (1986-07-01), Robinson
patent: 4763289 (1988-08-01), Barzilai et al.
patent: 5345393 (1994-09-01), Ueda
patent: 5345401 (1994-09-01), Tani
patent: 5404360 (1995-04-01), Suzuki et al.
Beausoliel, Jr. Robert W.
Mendenhall Larry
Synopsys Inc.
Wright Norman M.
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