Chroma control circuit for a digital television receiver

Details Chroma control circuit for a digital television receiver Chroma control circuit for a digital television receiver

1986-12-19

1989-02-28

Groody, James J.

Facsimile and static presentation processing

Static presentation processing

Attribute control

358 28, H04N 964

Patent

active

048090590

ABSTRACT:
In a chroma control circuit for a digital television receiver, the system clock lies in the range of four-times the chrominance-subcarrier frequency. The originally received color-burst signal is locked in frequency and phase to the system clock by means of an all-digital phase-locked loop. The phase-difference angle between the color-burst signal and the system clock appears as a sine or cosine value in the two standard color-difference signals of the chrominance demodulator during the reception of the color-burst signal. One of the standard color-difference signals, the B-Y signal, is fed through a horizontal-frequency-suppressing loop filter to a digital oscillator. The latter determines the speed of rotation of a hue adjustment angle rotating at approximately constant angular speed. The respective sine and cosine values of the hue adjustment angle are read as data values from first and second read-only memories, respectively, and are fed to the sine and cosine inputs of a hue adjuster in a calculating stage which derives the color-burst signal and the chrominance signal.

REFERENCES:
patent: 4270139 (1981-05-01), Flamm et al.
patent: 4482916 (1984-11-01), Acampora
patent: 4568967 (1986-02-01), Freyberger et al.
patent: 4682209 (1987-07-01), Nillesen
Rolf Deubert, "Digital prowness increases in color television sets," Electronics, Sep. 8, 1983, pp. 131-133.
Thomas Fischer, "Digital VLSI breeds next-generation TV receivers," ELECTRONICS, Aug. 11, 1981, pp. 97-103.

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