Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude
Reexamination Certificate
2002-07-18
2003-05-20
Lam, Tuan T. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific signal discriminating without subsequent control
By amplitude
C327S093000
Reexamination Certificate
active
06566916
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
This invention relates to a chopper type comparator.
BACKGROUND OF THE INVENTION
In a chopper type comparator, an input voltage and a predetermined reference voltage is compared and an output voltage corresponding to the reference between the input voltage and the reference voltage is generated. Recently, it is required to reduce an offset difference of an output voltage.
OBJECTS OF THE INVENTION
Accordingly, an object of the present invention is to provide a chopper type comparator in which an offset difference is reduced.
Additional objects, advantages and novel features of the present invention will be set forth in part in the description that follows, and in part will become apparent to those skilled in the art upon examination of the following or may be learned by practice of the invention. The objects and advantages of the invention may be
SUMMARY OF THE INVENTION
According to a first aspect of the present invention, a chopper type comparator includes an input switch circuit which inputs an input voltage and a reference voltage alternately in response to a control signal; an output terminal which supplies an output voltage, having a level defined based on the difference between the input voltage and the reference voltage; a capacitor which is coupled between the input switch circuit and the output terminal; and a node which is coupled between the capacitor and the output terminal; a first inverter coupled between the node and the output terminal.
The comparator further includes a first MOS transistor which is coupled between the node and the output terminal in parallel to the first inverter and operates in response to the control signal, the first MOS transistor having a substrate voltage terminal; a supply terminal which provides a supply voltage; a bias control circuit which selectively connects the substrate voltage terminal of the first MOS transistor to the supply terminal and the output terminal in response to the control signal; and a timing control circuit which provide a delay to the control signal to be supplied to the first MOS transistor and the input switch circuit.
According to a second aspect of the present invention, a chopper type comparator includes an input switch circuit which inputs an input voltage and a reference voltage alternately in response to a control signal; an output terminal which supplies an output voltage, having a level defined based on the difference between the input voltage and the reference voltage; a capacitor which is coupled between the input switch circuit and the output terminal; a node which is coupled between the capacitor and the output terminal; a first inverter coupled between the node and the output terminal; a first MOS transistor which is coupled between the node and the output terminal in parallel to the first inverter and operates in response to the control signal, the first MOS transistor having a substrate voltage terminal; a second MOS transistor which is coupled between the node and the output terminal in parallel to the first inverter and operates in response to the control signal, the second MOS transistor having a substrate voltage terminal; and a supply terminal which provides a supply voltage.
The comparator further includes a first bias control circuit which selectively connects the substrate voltage terminal of the first MOS transistor to the supply terminal and the output terminal in response to the control signal; a second bias control circuit which selectively connects the substrate voltage terminal of the second MOS transistor to the supply terminal and the output terminal in response to the control signal; and a timing control circuit which provide a delay to the control signal to be supplied to the first MOS transistor, the first bias control circuit and the input switch circuit.
REFERENCES:
patent: 4745393 (1988-05-01), Tsukada et al.
patent: 5952951 (1999-09-01), Fujino
patent: 6271691 (2001-08-01), Toyoda et al.
Morimoto Haruaki
Sato Yukio
Lam Tuan T.
Oki Electric Industry Co. Ltd.
Volentine & Francos, PLLC
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