Chopper stabilized delta-sigma analog-to-digital converter

Details Chopper stabilized delta-sigma analog-to-digital converter Chopper stabilized delta-sigma analog-to-digital converter

1988-06-13

1990-07-03

Shoop, Jr., William M.

Coded data generation or conversion

Analog to or from digital conversion

Differential encoder and/or decoder

341118, 330259, 307491, H03M 302

Patent

active

049395165

ABSTRACT:
A chopper stabilized analog-to-digital converter includes an analog modulator (10) and a digital filter (12). The analog modulator (10) is comprised of two integrators (20) and (22). The first integrator (20) is a chopper stabilized integrator which is comprised of a chopper stabilized differential amplifier (32) and a capacitively switched input. The amplifier (32) is operable to receive a chopping frequency F.sub.CH that is one-half the sampling frequency F.sub.S and synchronized thereto. The amplifier (32) is operable to modulate the noise up to the chopping frequency F.sub.CH, which frequency is in the rejection portion of the filter response for the digital filter (12), thus rejecting 1/f noise.

REFERENCES:
patent: 4138649 (1979-02-01), Schaffer
patent: 4542354 (1985-09-01), Robinton et al.
patent: 4560975 (1985-12-01), Jarva
patent: 4590458 (1986-05-01), Evans et al.
patent: 4633223 (1986-12-01), Senderowicz
"The Structure of Quantization Noise from Sigma-Delta Modulation", J. C. Candy & O'Connell J. Benjamin, IEEE Trans. Comm., vol. COM-29, No. 9, Sep. 1981, pp. 1316-1323.
J. Robert, G. C. Temes, F. Krummenacher, V. Valencic, P. Deval, "A Low-Voltage High-Resolution CMOS A/D Converter with Analog Compensation," IEEE 1986 Custom Integrated Circuits Conference, pp. 362-363.
K. Hsieh, P. R. Gray, D. Senderowicz, D. G. Messerschmidt, "A Low-Noise Chopper-Stabilized Differential Switched-Capacitor Filtering Technique", IEEE JOSSC, vol. SC-16, No. 6, Dec. 1981, pp. 708-715.
"Grab Distributed Sensor Data with 16-Bit Delta-Sigma ADCs", Frank Goodenaugh, Electronic Design, Apr. 14, 1988, pp. 49-56.

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