Amplifiers – With periodic switching input-output
Patent
1999-04-20
2000-10-10
Pascal, Robert
Amplifiers
With periodic switching input-output
330 51, 327124, H03F 102
Patent
active
061305782
ABSTRACT:
The chopping frequency driving a chopper-stabilized amplifier (CSA) is dynamically varied between an upper and lower frequency limit to reduce the intermodulation distortion, clock noise and low-frequency noise found in prior art designs. The upper limit is set to accommodate the settling times required by the CSA's memory capacitors, and the lower limit is set to a non-zero frequency significantly greater than DC to reduce low frequency noise. The two limits permit IMD and clock noise to be widely scattered and enable a near optimum trade off between IMD and chopping noise on one hand, and low frequency noise on the other. The chopping frequency is preferably generated digitally with a loadable counter which divides down a fixed frequency master clock, with the binary value presented at the counter's load inputs periodically varied to dynamically vary the division ratio and thus frequency modulate the chopping frequency. The binary value presented to the load inputs are generated with a second counter or a PRBS, for example, which establish the upper and lower frequency limits.
REFERENCES:
patent: 4138649 (1979-02-01), Schaffer
patent: 4931745 (1990-06-01), Goff et al.
patent: 4939516 (1990-07-01), Early
patent: 5115202 (1992-05-01), Brown
patent: 5486788 (1996-01-01), Schlager et al.
patent: 5926066 (1999-07-01), Sauer
Paul Horowitz and Winfield Hill, "Precision Circuits and Low-Noise Techniques", The Art Of Electronics, Second Edition, Chapter 7, pp. 416-417 (1989).
Analog Devices Inc.
Choe Henry
Pascal Robert
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