Chopped low power magnetic-field detector with hysteresis memory

Details Chopped low power magnetic-field detector with hysteresis memory Chopped low power magnetic-field detector with hysteresis memory

1996-02-12

1997-04-08

O'Shea, Sandra L.

Electricity: measuring and testing

Magnetic

Magnetometers

32420712, 324225, 327511, G01R 3306, G01R 3307, G01R 33025, H03K 338

Patent

active

056191375

ABSTRACT:
A low power magnetic-field detector, of the kind for detecting an ambient magnetic field that is greater than a predetermined field strength, is comprised of a Hail element, a transducer-voltage amplifier, and a zero-crossing comparator, all connected in tandem. A clock and switch are used to chop the energizing current to the Hall element. Alternatively, the amplifier and comparator are also chopped to further reduce power consumption. A clockable flip flop is synchronously enabled for an instant at the end of each period of energizing the Hall element. The comparator output signal is transferred to the flip flop Q output and held there during each period of not energizing the Hall element. A Positive-feedback hysteresis circuit adds a bias voltage to the amplified Hall voltage and is applied to the comparator input to effect comparator hysteresis with memory covering clock-period portions when the Hall element is not energized. The comparator is thus transformed into a Schmitt trigger circuit having hysteresis memory, making it possible to chop the Hall element to substantially reduce the detector power consumption without loosing the hysteresis feature.

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