Chip type solid electrolytic capacitor

Electricity: electrical systems and devices – Electrolytic systems or devices – Solid electrolytic capacitor

Reexamination Certificate

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Details

C361S523000, C361S330000, C361S540000, C205S173000, C205S317000

Reexamination Certificate

active

06229688

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a chip type solid electrolytic capacitor and, particularly, to a chip type solid electrolytic capacitor constructed with a solid electrolytic capacitor element encapsulated in a mold resin.
2. Description of the Prior Art
A conventional chip type tantalum solid electrolytic capacitor encapsulated in a mold resin will be described with reference to a cross section thereof shown in FIG.
1
. In
FIG. 1
, an end of an external anode terminal
2
for external electric connection is directly connected to an end of an anode lead
5
of a capacitor element
1
and an end portion of an external cathode terminal
3
is connected to a cathode terminal of the capacitor element
1
through an electrically conductive adhesive
6
. The capacitor element
1
, the anode lead
5
together with the end portion of the external anode terminal
2
and the end portion of the external cathode terminal
3
together with the electrically conductive adhesive
6
are encapsulated in a mold resin
4
of such as epoxy resin such that the remaining portions of the anode terminal
2
and the cathode terminal
3
are led out from the capacitor element
1
through the mold resin
4
. The anode terminal
2
and the cathode terminal
3
are bent such that the these terminals
2
and
3
extend along side surfaces of the mold resin and a mounting surface, that is, a lower surface of the mold resin
4
.
Describing a fabrication method of the tantalum solid electrolytic capacitor element
1
, a porous anode member having a number of minute voids is obtained by sintering metal tantalum powder into, for example, a parallelepiped shape and, then, a tantalum oxide film (not shown) is formed on a surface of the parallelepiped porous anode member as a dielectric member by anodizing the surface of the parallelepiped porous anode member. Incidentally, in order to form the anode lead
5
, a tantalum wire is preliminarily implanted in one of surfaces of the parallelepiped porous anode member before the sintering is performed. The anodizing of the surfaces of the porous anode member is performed such that no tantalum oxide film is formed on a surface of the anode lead
5
.
Thereafter, a manganese dioxide film (not shown) is formed on the tantalum oxide film as a solid electrolytic layer and a cathode conductor layer is formed on the solid electrolytic layer. The solid electrolytic layer may be formed of electrically conductive high molecular material such as pyrrole or thiophene. The cathode conductor layer is formed by laminating, for example, a graphite layer and a silver paste layer, in the order.
Thereafter, the end portion of the anode terminal
2
in the form of a flat plate is electrically and mechanically connected to the end portion of the anode lead
5
of the tantalum solid electrolytic element
1
by electric resistance welding or laser welding. Furthermore, the end portion of the cathode terminal
3
in the form of a flat plate, which is preliminarily shaped correspondingly to a surface configuration of the solid electrolytic capacitor element
1
, is electrically and mechanically connected to the cathode conductor layer on a surface of the solid electrolytic capacitor element
1
by the electrically conductive adhesive
6
.
Thereafter, the solid electrolytic capacitor element
1
with the anode lead
5
, the portions of the anode terminal
2
and the cathode terminal
3
are encapsulated in the mold resin
4
of thermosetting resin such as epoxy resin by using a transfer molding process.
Finally, portions of the anode terminal
2
and the cathode terminal
3
, which are led out from the mold resin
4
, are bent along the side surfaces and then the lower surface of the resin mold
4
, resulting in the resin-capsulated chip type tantalum solid electrolytic capacitor shown in FIG.
1
.
In order to realize an electronic circuit designed with using various electronic parts including active parts such as semiconductor devices and passive parts such as capacitors, these parts are mounted on a mounting substrate such as a printed circuit board. The mounting of such parts itself is usually performed by using a solder reflow method. In such case, a surface mounting part having a terminal structure as shown in
FIG. 1
is mounted on the printed circuit board by soldering connecting portions
71
and
72
of the anode and cathode terminals
2
and
3
, which extend along the lower surface (mounting surface) of the mold resin
4
, to lands of the printed circuit board.
In the conventional chip type solid electrolytic capacitor, there may be a case where a connection between the chip type solid electrolytic capacitor and the mounting substrate is broken by deviation of the chip type capacitor from a precisely positioned initial location on the land portions of the mounting substrate or by a phenomenon called “tombstone” in which the chip type capacitor uprises vertically, in a progress of the solder reflow process. The positional deviation and the tombstone phenomenon of the chip type capacitor in the progress of the solder reflow process may occur for the reasons to be described below.
Briefly describing the mounting of, for example, the chip type solid electrolytic capacitor by using solder reflow, the land portions of the mounting substrate are painted with cream solder and then the chip type capacitor is positioned on the mounting substrate such that the connection portions
71
and
72
of the chip type capacitor are exactly located on the land portions, respectively. In this state, the chip type capacitor is temporarily fixed to the mounting substrate by the cream solder. Thereafter, the mounting substrate together with the chip type capacitor thereon is heated to a temperature not lower than a melting point of the cream solder to melt the cream solder. Finally, the heating is terminated to lower the temperature to thereby solidify the solder again.
The heating may be performed by heat source contact method for directly heating a lower surface of the mounting substrate or environment heating method for heating the mounting substrate and the parts mounted thereon by means of a hot blast furnace or an infrared furnace. The heating temperature is theoretically any so long as it is not lower than the melting point of the solder. However, taking adverse effect on electronic parts and production efficiency thereof when they are exposed to a temperature substantially higher than a practical temperature or guaranteed temperature such as the melting point of the solder for a long time into consideration, it is usual to use a temperature profile including high speed heating to a high peak temperature and a short holding time of the peak temperature. That is, it is usual to rapidly heating the mounting substrate and the chip type capacitor to, for example, 240° C. and keep the temperature for a time not longer than, for example, 10 seconds.
In the chip type tantalum solid electrolytic capacitor shown in
FIG. 1
, the capacitor element
1
, particularly, manganese dioxide forming the solid electrolytic layer or electrically conductive high molecular layer, a graphite layer and the silver paste layer constituting the cathode conductive layer thereof, contains water, which is taken therein from vaporized water in atmosphere during the fabrication process of the capacitor element or during a storage of the fabricated capacitor element.
Water content contained in the capacitor element of the chip type capacitor is heated to a temperature higher than the boiling point thereof in mounting the chip type capacitor on the mounting substrate by solder reflow and vaporized to increase the internal pressure of the mold resin
4
. Since the chip type capacitor is rapidly heated to the solder reflow temperature as high as 240° C. substantially higher than the boiling point of water, the internal pressure of the chip type capacitor is increased substantially at high rate. In such case, since the capacitor element
1
of the conventional chip type solid electr

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