Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With large area flexible electrodes in press contact with...
Reexamination Certificate
2001-02-28
2003-09-02
Cao, Phat X. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With large area flexible electrodes in press contact with...
C257S181000, C257S747000, C257S765000, C257S771000
Reexamination Certificate
active
06614105
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a chip-type semiconductor device. More particularly, the present invention relates to a chip-type semiconductor device having an element body, an electrode provided on at least one surface of the element body, and a thermal stress cushioning plate provided on the electrode by interposing an alloy plate made of aluminum and silicon.
DESCRIPTION OF THE RELATED ART
FIG. 7
illustrates an arrangement of a TRIAC which is a typical example of such chip-type semiconductor device. This TRIAC has electrodes
11
and
12
on one surface (upper surface in
FIG. 7
) of an element body
10
made of silicon and an electrode
13
on the other surface (lower surface in FIG.
7
). On the electrode
12
, a molybdenum plate
30
is provided as a thermal stress cushioning plate by a high-temperature (melting point of about 290° C.) solder layer
20
. And, on the electrode
13
, a molybdenum plate
31
is provided as a thermal stress cushioning plate by a hightemperature solder layer
21
.
When a user mounts the TRIAC on a circuitry substrate or the like, the molybdenum plate
30
is secured to an outer electrode plate (T
1
terminal)
40
made of copper by a low-temperature (melting point of about solder 180° C.) layer
25
, and the molybdenum plate
31
is secured to an outer electrode plate (T
2
terminal)
41
made of copper by a low-temperature layer
26
, and a wire (gate lead)
45
made of aluminum is bonded to the electrode
11
.
Wherein, the molybdenum plates
30
and
31
are employed for preventing application of thermal stress to the element body
10
, the thermal stress being caused by difference between thermal expansion coefficient of the outer electrode plates
40
and
41
and thermal expansion coefficient of the element body
10
made of silicon.
For the above chip-type semiconductor device, a providing and securing method which does not include lead is required to be developed, because lead (Pb) included within the high-temperature solder layer
20
and
21
and within the low-temperature solder layer
25
and
26
is harmful following a home electric device recycle law which will be issued soon and an European parliamentary instruction regarding waste electronic devices.
The low-temperature solder is used for connecting the chip-type semiconductor device to the outer electrode plates
40
and
41
. The composition of the low-temperature is Pb: 38% and Sn: 62%, for example. For the low-temperature solder, new low-temperature solder is going to be produced commercially instead the above low-temperature solder, but the melting point of the new low-temperature solder is increased, i.e. 240~250° C.
On the other hand, the high-temperature solder is used for adhering silicon (element body
10
) and molybdenum (molybdenum plates
30
and
31
). The composition of the high-temperature solder is Pb: 92.5%, Ag: 2.5%, and In: 5%, for example. The Pb content is remarkably great for increasing the adhesion force of the both by increasing viscosity. It is a great issue how to deal or improve or the like the high-temperature solder, especially. But, no effective measure is taken at all under the present condition.
Further, when the melting point of the low-temperature solder used by a user is not sufficiently lower than that of the high-temperature solder which is used for the chip-type semiconductor, the high-temperature solder layers
20
and
21
of the chip-type semiconductor device are melted easily by the heat generated by soldering when the chip-type semiconductor device is connected to the outer electrode plates
40
and
41
. The substitute of the above low-temperature solder is high in melting point such as 240~250° C. Therefore, when such substitute is employed, adhesive agent having higher melting point should be employed instead the conventional adhesive agent for adhering the element body
10
and the molybdenum plates
30
and
31
. It is difficult for developing such adhesive agent having a high melting point.
Furthermore, the molybdenum plates
30
and
31
cannot sufficiently realize thermal stress cushioning effect which is the essential characteristic, because the molybdenum plates
30
and
31
and the element body
10
are adhered by the high-temperature solder layers
20
and
21
. Therefore, the expansion quantity of solder is directly applied to the element body
10
in real so that the thermal stress life of the element body
10
is directly influenced badly.
The present invention was made in view of the conventional problems.
It is an object of the present invention to offer a chip-type semiconductor device which employs means for firmly connecting an electrode and a thermal stress cushioning plate without employing conventional high-temperature solder having extremely great Pb content, and for preventing melting even when new developed low-temperature solder substitute is employed, and for sufficiently make the most of the operation of a thermal stress cushioning plate.
A chip-type semiconductor device according to the present invention comprises an element body, an electrode provided on at least one surface of the element body, a thermal stress cushioning plate, and an alloy plate made of aluminum and silicon for connecting the electrode and the thermal stress cushioning plate.
In one embodiment of the present invention, a composition of the alloy plate is aluminum content of 87~89% and silicon content of 11~13%. Within this extent, it is most preferable in operations and effects that the alloy plate has the composition for aluminum content of 88% and silicon content of 12% so that the eutectic temperature becomes extremely high temperature of about 580° C.
REFERENCES:
patent: 5081067 (1992-01-01), Shimizu et al.
patent: 6033787 (2000-03-01), Nagase et al.
patent: 53-117966 (1978-10-01), None
patent: 9-27572 (1988-11-01), None
Cao Phat X.
Doan Theresa T.
Powered Co., Ltd.
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