Adhesive bonding and miscellaneous chemical manufacture – Methods – Surface bonding and/or assembly therefor
Reexamination Certificate
1997-08-01
2002-11-12
Gallagher, John J. (Department: 1733)
Adhesive bonding and miscellaneous chemical manufacture
Methods
Surface bonding and/or assembly therefor
C029S830000, C029S846000, C156S306900, C156S319000, C156S331100, C156S331500, C428S471000
Reexamination Certificate
active
06478920
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a chip-type circuit component comprising a pair of substrates and a thin film circuit pattern which is formed on at least one of opposite surfaces of the substrates, and a method of manufacturing the same.
2. Description of the Background Art
Examples of a chip-type circuit component comprising substrates and thin film circuit patterns which are formed on surfaces thereof are an inductance component, a band-pass filter, a high-frequency coil and a transformer. Such a conventional chip-type circuit component is formed by stacking a plurality of substrates, which are provided with thin film circuit patterns, with each other. For example, an inductance component is manufactured by forming a magnetic layer by printing paste which is mainly composed of ferrite, or preparing a green sheet which is mainly composed of ferrite, printing metal powder paste on the magnetic layer for forming a circuit pattern for inductance, stacking a plurality of such magnetic layers with each other for integrating the same, and firing the laminate as formed.
In such a method of manufacturing an inductance component, however, fine patterns cannot be obtained since the circuit patterns for inductance are formed by printing, and the inductance component is restricted in miniaturization since the degree of integration cannot be improved. Further, the laminate of the magnetic layers is fired at a temperature of about 1000° C. and hence cracking or breaking is caused by shrinkage of the magnetic layers. When the paste layers for forming the inductance circuit patterns are increased in thickness in order to reduce conductor resistance, evaporation of a solvent contained in the paste is increased to cause delamination between the magnetic layers during firing.
When the inductance component is integrally fired with paste or a green sheet consisting of a different ceramics material to be integrated with a capacitor component, further, substrates may be separated from each other at bonding surfaces therebetween due to a reaction during firing or due to a difference in rate of shrinkage.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a highly reliable chip-type circuit component which can prevent occurrence of cracking, breaking and delamination, and a method of manufacturing the same.
The inventive chip-type circuit component comprises a first substrate, a second substrate which is bonded with the first substrate for forming a chip body, a polyimide adhesion layer which is provided between the first and second substrates, a thin film circuit pattern which is formed on at least one of opposite surfaces of the first and second substrates, and an external electrode which is formed on an end surface of the chip body to be electrically connected with the thin film circuit pattern.
The inventive method is adapted to manufacture the aforementioned chip-type circuit component according to the present invention.
According to a first aspect of the present invention, the method comprises a step of forming a thin film circuit pattern on at least one of opposite surfaces of first and second substrates, a step of applying polyamide resin varnish to at least one of the opposite surfaces of the first and second substrates, heat treating the polyamide resin varnish as applied for converting the same to polyimide, and a step of superposing the first and second substrates with each other to hold the surface of the first or second substrate coated with the polyamide resin varnish and heating the same in a vacuum to a temperature of 200 to 500° C. with application of a pressure of 10 to 100 kg/cm
2
in the direction of stacking, thereby bonding the first and second substrates with each other through a polyimide adhesion layer.
According to a second aspect of the present invention, the method comprises a step of forming a thin film circuit pattern on at least one of opposite surfaces of first and second substrates, and a step of superposing the first and second substrates while interposing a polyimide sheet between the opposite surfaces thereof and heating the same in a vacuum at a temperature of 200 to 500° C. with application of a pressure of 10 to 100 kg/cm
2
in the direction of stacking, thereby bonding the first and second substrates with each other through a polyimide adhesion layer formed by the polyimide sheet.
According to a third aspect of the present invention, the method comprises a step of bonding first and second mother substrates with each other through a polyimide adhesion layer for obtaining a mother chip body, and a step of cutting the mother chip body into independent chip bodies.
The first and second substrates employed in the present invention are not particularly restricted as long as the same are wable in a chip-type circuit component, and can be prepared from insulating substrates, magnetic substrates or dielectric substrates. In general, a mother substrate is cut and worked into independent chip components. In this case, the mother substrate is two inches square in size, for example. The first and second substrates preferably have flat opposite surfaces, since the same are bonded with each other. In more concrete terms, the opposite surfaces of the first and second substrates are preferably not more than 100 &mgr;m/2 inch square in flatness. Such flatness of the surfaces is measured by an optical wave interference type flatness tester. The substrates are made to have flat opposite surfaces so that no unadhering portion is caused when the substrates are bonded with each other through an adhesive, and no cracking is caused when a pressure is applied. The surfaces are preferably flat also for improving dimensional accuracy in patterning by contact exposure in formation of the thin film circuit pattern.
According to the present invention, the surface of each substrate preferably has a center line average height of not more than 2.0 &mgr;m. The center line average height of the surface is measured by a tracer type surface roughness tester. If the substrate surface exceeds 2.0 &mgr;m in center line average height, microcracks are easily caused in adhesion. Further, the center line average height is preferably reduced also for improving accuracy in photoetching of the circuit pattern. The surface may be subjected to mirror finish polishing, for example, to be reduced in center line average height. In order to further improve adhesion strength, the center line average height is preferably reduced to about 0.2±0.05 &mgr;m.
According to the present invention, variation in thickness of the substrates is preferably not more than 1%. It is possible to improve electrical properties such as capacitance, reactance and the coupling factor by reducing the variation in thickness.
According to the present invention, it is possible to form the circuit pattern on at least one of the first and second substrates by patterning a thin film, which is formed by sputtering, vapor deposition or plating, by photoetching or the like. Examples of the circuit pattern are various circuit patterns such as those of an inductance, a capacitor, a resistor, and a distributed-constant circuit and a concentrated-constant circuit thereof.
According to the first aspect of the present invention, the polyimide adhesion layer is prepared from polyamide resin varnish. This polyamide resin varnish is applied to at least one of the first and second substrates, and heat treated in the air or inert gas. Thus, the polyamide resin varnish is dewatered and dried with evaporation of a solvent contained therein, and converted to polyimide, to be improved in adhesiveness and adhesion strength. When the polyamide resin varnish is dried in inert gas, it is possible to prevent a metal forming the circuit pattern from oxidation.
When the temperature is too high or the treatment time is too long in the heat treatment, resin hardening progresses to cause difficulty in adhesion. Therefore, the polyamide resin varnish is preferably heat treated for about
Bando Masahiro
Kanoh Osamu
Kawaguchi Masahiko
Senda Atsuo
Gallagher John J.
Murata Manufacturing Co. Ltd.
Ostrolenk Faber Gerb & Soffen, LLP
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