Chip to chip interface for encoding data and clock signals

Details Chip to chip interface for encoding data and clock signals Chip to chip interface for encoding data and clock signals

2006-12-05

2006-12-05

Barnie, Rexford (Department: 2819)

Coded data generation or conversion

Digital code to digital code converters

To or from multi-level codes

C341S057000

Reexamination Certificate

active

07145483

ABSTRACT:
A chip to chip interface comprises a driver configured to receive a data signal and provide an output signal at a first level in response to receiving an odd number of consecutive logic highs in the data signal, at a second level in response to receiving an odd number of consecutive logic lows in the data signal, at a third level in response to receiving an even number of consecutive logic highs in the data signal and at a fourth level in response to receiving an even number of consecutive logic lows in the data signal.

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