Chip to chip information bit transmission process and device

Details Chip to chip information bit transmission process and device Chip to chip information bit transmission process and device

1983-12-01

1985-09-03

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

375 17, H04J 306, H04L 300, H04L 2534, H04L 2549

Patent

active

045396809

ABSTRACT:
In the transmitting chip, the bits are serialized and applied to a coding circuit in which bit stream (D) and its complement (D) are transformed into two signals (PH1 and PH2) under the control of a saw-tooth clock signal CK'. Signals (PH1 and PH2) are sent to the receiving chip, wherein they are applied to a decoding circuit which generates two signals (DJ) and (DK) representative of the data bits and a recovered clock signal CLK. The three signals (DJ, DK and CLK) as well as a frame signal (F) are used by a converting and demultiplexing circuit for assembling bytes of parallel data bits.

REFERENCES:
patent: 3731199 (1973-05-01), Tazaki et al.
patent: 4380080 (1983-04-01), Rattlingourd

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