Electrical resistors – Resistance value responsive to a condition – Current and/or voltage
Reexamination Certificate
1998-07-28
2001-02-06
Gellner, Michael L. (Department: 2832)
Electrical resistors
Resistance value responsive to a condition
Current and/or voltage
C338S225000, C338S204000
Reexamination Certificate
active
06184772
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to chip thermistors of the type which are commonly used for the protection of an electronic circuit or as a temperature-detecting sensor and, more particularly, to chip thermistors having electrodes formed overlappingly both on an outer surface of and inside a thermistor element.
The demand to be surface-mountable directly to a circuit board is just as strong on thermistors as on other kinds of electronic components. For this reason, many kinds of thermistors in the form of a chip (or chip thermistors) have been considered.
FIG. 8A
shows an example of prior art chip thermistor
61
having outer electrodes
63
and
64
formed at both end parts of a thermistor element
62
. Each of the outer electrodes
63
and
64
is formed on one of the end surfaces and reaches the four side surfaces adjacent thereto such that the chip thermistor
61
can be surface-mounted, say, by soldering to electrode lands on a printed circuit board.
Inside the thermistor element
62
, there may be inner electrodes
65
,
66
and
67
each electrically connected to one of the outer electrodes
63
and
64
, as shown in
FIG. 8B
, such that the resistance between the outer electrodes
63
and
64
is determined not only by the specific resistance (or the resistivity) of the thermistor element
62
but also the overlapping areas of the inner electrodes
65
-
67
.
FIG. 8C
shows another chip thermistor
68
of a kind having no inner electrodes inside its thermistor element
62
. In this case, the resistance between the outer electrodes
63
and
64
is determined by the distance therebetween and the specific resistivity of the thermistor element
62
.
FIG. 9
shows still another prior art chip thermistor
71
characterized as having outer electrodes
73
and
74
formed opposite each other on the upper surface of a thermistor element
72
of a semiconductor ceramic material such that they are separated by a specified distance D. In this example, the resistance is adjusted by the distance D of separation between the outer electrodes
73
and
74
. Thus, this distance D must be changed for each type or lot of thermistors to be mass-produced, corresponding to the desired resistance. If the desired resistance value is very small, in particular, the distance of separation D must accordingly be made small, but if this distance D is made too small, the two outer electrodes
73
and
74
may contact each other. Since the rate of change in resistance per unit change in distance D becomes large as D is made smaller, it becomes difficult to control the resistance value and hence the variation in the resistance values of the obtained products also becomes large.
With prior art chip thermistors of the types shown in
FIGS. 8A
,
8
B and
8
C at
61
and
68
, the variation 3&sgr;/x (where &sgr; is the standard deviation and x is the average) in the resistance values is fairly large, being about 4-10%. Thus, there has been a strong demand to reduce this variation, say, to within about ±1%, but it has been very difficult to respond to this demand. Another problem of this type of prior art chip thermistors was that a fillet is likely to be formed by a solder while it extends upward as it is surface-mounted, say, onto a printed circuit board from the bottom sides
63
a
and
64
a
of the outer electrodes
63
and
64
because this would make a high-density mounting difficult. Because of their shape, furthermore, these bottom sides
63
a
and
64
a
of the outer electrodes
63
and
64
cannot easily be bonded by a so-called bump-bonding method which is frequently used for effecting a high-density mounting.
SUMMARY OF THE INVENTION
It is therefore an object of this invention to provide an improved type of chip thermistors of which the variation in the resistance values can be reduced.
It is another object of this invention to provide such chip thermistors which can be surface-mounted at a high density, allowing the use of a bump-bonding method.
A chip thermistor embodying this invention, with which the above and other objects can be accomplished, may be characterized as having a pair of outer electrodes formed opposite each other with a specified distance therebetween on one of the surfaces of a thermistor element and an inner electrode extending inside the thermistor element so as to overlap with these outer electrodes in the direction perpendicular to the surface on which the outer electrodes are formed. According to a preferred embodiment of the invention, an electrically insulating layer is disposed on the same surface as and between the pair of outer electrodes. Each of the outer electrodes may be formed with two or more layers, the outermost of the layers being of gold. The resistance value of such a chip thermistor can be adjusted by abrading at least a portion of the edges of the thermistor element together with portions of the outer electrodes.
REFERENCES:
patent: 4685203 (1987-08-01), Takada et al.
patent: 5534843 (1996-07-01), Tsunoda et al.
patent: 1-289201 (1989-11-01), None
patent: 6-302406 (1993-04-01), None
patent: 5-243007 (1993-09-01), None
patent: 7-29704 (1995-01-01), None
patent: 9-0117609 (1995-06-01), None
Kawase Masahiko
Kitoh Norimitsu
Gellner Michael L.
Lee Kyung S.
Majestic, Parsons, Siebert & Hsue P.C.
Murata Manufacturing Co. Ltd.
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